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Bentian Jiang
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2020 – today
- 2024
- [j4]Lixin Liu, Tianji Liu, Bentian Jiang, Evangeline F. Y. Young:
Parmesan: Efficient Partitioning and Mapping Flow for DNN Training on General Device Topology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(8): 2426-2439 (2024) - [c10]Shiju Lin, Bentian Jiang, Weihua Sheng, Evangeline F. Y. Young:
Size-Optimized Depth-Constrained Large Parallel Prefix Circuits. DAC 2024: 176:1-176:6 - 2023
- [j3]Bentian Jiang, Xinshi Zang, Martin D. F. Wong, Evangeline F. Y. Young:
Exploring Rule-Free Layout Decomposition via Deep Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(9): 3067-3077 (2023) - 2022
- [j2]Bentian Jiang, Jingsong Chen, Jinwei Liu, Lixin Liu, Fangzhou Wang, Xiaopeng Zhang, Evangeline F. Y. Young:
CU.POKer: Placing DNNs on WSE With Optimal Kernel Sizing and Efficient Protocol Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(6): 1888-1901 (2022) - [j1]Bentian Jiang, Lixin Liu, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young:
Neural-ILT 2.0: Migrating ILT to Domain-Specific and Multitask-Enabled Neural Network. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(8): 2671-2684 (2022) - [c9]Jinwei Liu, Xiaopeng Zhang, Shiju Lin, Xinshi Zang, Jingsong Chen, Bentian Jiang, Martin D. F. Wong, Evangeline F. Y. Young:
Partition and place finite element model on wafer-scale engine. DAC 2022: 631-636 - [c8]Qijing Wang, Bentian Jiang, Martin D. F. Wong, Evangeline F. Y. Young:
A2-ILT: GPU accelerated ILT with spatial attention mechanism. DAC 2022: 967-972 - 2021
- [c7]Bentian Jiang, Xiaopeng Zhang, Lixin Liu, Evangeline F. Y. Young:
Building up End-to-end Mask Optimization Framework with Self-training. ISPD 2021: 63-70 - 2020
- [c6]Bentian Jiang, Lixin Liu, Yuzhe Ma, Hang Zhang, Bei Yu, Evangeline F. Y. Young:
Neural-ILT: Migrating ILT to Neural Networks for Mask Printability and Complexity Co-optimization. ICCAD 2020: 20:1-20:9 - [c5]Bentian Jiang, Jingsong Chen, Jinwei Liu, Lixin Liu, Fangzhou Wang, Xiaopeng Zhang, Evangeline F. Y. Young:
CU.POKer: Placing DNNs on Wafer-Scale Al Accelerator with Optimal Kernel Sizing. ICCAD 2020: 142:1-142:9
2010 – 2019
- 2019
- [c4]Bentian Jiang, Hang Zhang, Jinglei Yang, Evangeline F. Y. Young:
A fast machine learning-based mask printability predictor for OPC acceleration. ASP-DAC 2019: 412-419 - [c3]Gengjie Chen, Chak-Wa Pui, Haocheng Li, Jingsong Chen, Bentian Jiang, Evangeline F. Y. Young:
Detailed routing by sparse grid graph and minimum-area-captured path search. ASP-DAC 2019: 754-760 - [c2]Bentian Jiang, Xiaopeng Zhang, Ran Chen, Gengjie Chen, Peishan Tu, Wei Li, Evangeline F. Y. Young, Bei Yu:
FIT: Fill Insertion Considering Timing. DAC 2019: 221 - [c1]Haocheng Li, Gengjie Chen, Bentian Jiang, Jingsong Chen, Evangeline F. Y. Young:
Dr. CU 2.0: A Scalable Detailed Routing Framework with Correct-by-Construction Design Rule Satisfaction. ICCAD 2019: 1-7
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