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ORCIDVictor Silva 0001
Person information
- affiliation: Technical University of Lisbon, INESC-ID IST UTL, Portugal
Other persons with the same name
- Victor Silva 0002 (aka: Victor Machado Silva) — Federal University of Rio de Janeiro, PESC/COPPE, Brazil
- Victor Silva 0003 — University of Alberta, Department of Computing Science, Edmonton, AB, Canada
- Victor Silva 0004 — Federal University of Paraíba, João Pessoa, PB, Brazil
Other persons with a similar name
- Víctor C. S. Campos
![[0000-0002-2971-4125]](https://dblp.org/img/orcid-mark.12x12.png "0000-0002-2971-4125")
(aka: Víctor Costa da Silva Campos) - Vijay Victor D'Silva
- Víctor Manuel Silva García
- Victor Girotto (aka: Victor Augusto da Silva Girotto) — Arizona State University, Tempe, USA
- João Victor da Silva Guerra
- Victor Hugo da Silva Muniz
- Francisco Victor da Silva Pinheiro
- Victor Hugo Zárate Silva
- Victor do Nascimento Silva
- Pedro Victor Silva 0001 (aka: Pedro Victor Borges Caldas da Silva, Pedro Victor Borges 0001) — Télécom SudParis, Évry, France
- show all similar names
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2010 – 2019
- 2013
[c5]Victor Silva, Jorge R. Fernandes, Mário P. Véstias, Horácio C. Neto:
A reconfigurable computing architecture using magnetic tunneling junction memories. FPL 2013: 1-2- 2012
- [c4]Victor Silva, Mário P. Véstias, Horácio C. Neto, Jorge R. Fernandes:
Non-volatile memory circuits for FIMS and TAS writing techniques on magnetic tunnelling junctions. ICECS 2012: 809-812 - [c3]Victor Silva, Jorge R. Fernandes, Mário P. Véstias, Horácio C. Neto:
A High-Performance Reconfigurable Computing architecture using a magnetic configuration memory. ReConFig 2012: 1-6 - 2010
- [c2]Victor Silva, Jorge R. Fernandes, Horácio C. Neto:
Reconfigurable Circuits Using Magnetic Tunneling Junction Memories. DoCEIS 2010: 549-558
2000 – 2009
- 2009
- [c1]Victor Silva, Luís Bica Oliveira, Jorge R. Fernandes, Mário P. Véstias, Horácio C. Neto:
Run-Time Reconfigurable Array Using Magnetic RAM. DSD 2009: 74-81
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