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2020 – today
- 2023
[c13]Takeshi Senoo, Ryota Kayanoma, Akira Jinguji, Hiroki Nakahara:
A Light-Weight Vision Transformer Toward Near Memory Computation on an FPGA. ARC 2023: 338-353- [c12]Ryota Kayanoma, Akira Jinguji, Hiroki Nakahara:
A Many-core Architecture for an Ensemble Ternary Neural Network Toward High-Throughput Inference. MCSoC 2023: 446-453 - 2022
- [j3]Takeshi Senoo, Akira Jinguji, Ryosuke Kuramochi, Hiroki Nakahara:
Multilayer Perceptron Training Accelerator Using Systolic Array. IEICE Trans. Inf. Syst. 105-D(12): 2048-2056 (2022) - 2021
- [j2]Akira Jinguji
, Shimpei Sato, Hiroki Nakahara:
Weight Sparseness for a Feature-Map-Split-CNN Toward Low-Cost Embedded FPGAs. IEICE Trans. Inf. Syst. 104-D(12): 2040-2047 (2021) - [c11]Takeshi Senoo, Akira Jinguji, Ryosuke Kuramochi, Hiroki Nakahara:
A Multilayer Perceptron Training Accelerator using Systolic Array. APCCAS 2021: 77-80 - 2020
- [c10]Akira Jinguji, Shimpei Sato, Hiroki Nakahara:
Tiny On-Chip Memory Realization of Weight Sparseness Split-CNNs on Low-end FPGAs. FCCM 2020: 229 - [c9]Hiroki Nakahara, Zhiqiang Que, Akira Jinguji, Wayne Luk:
R2CNN: Recurrent Residual Convolutional Neural Network on FPGA. FPGA 2020: 319 - [c8]Youki Sada, Naoto Soga, Masayuki Shimoda, Akira Jinguji, Shimpei Sato, Hiroki Nakahara:
Fast Monocular Depth Estimation on an FPGA. IPDPS Workshops 2020: 143-146
2010 – 2019
- 2019
- [c7]Hiroki Nakahara, Akira Jinguji, Masayuki Shimoda, Shimpei Sato:
An FPGA-based Fine Tuning Accelerator for a Sparse CNN. FPGA 2019: 186 - [c6]Hiroki Nakahara, Youki Sada, Masayuki Shimoda, Kouki Sayama, Akira Jinguji, Shimpei Sato:
FPGA-Based Training Accelerator Utilizing Sparseness of Convolutional Neural Network. FPL 2019: 180-186 - [c5]Akira Jinguji, Youki Sada, Hiroki Nakahara:
Real-Time Multi-Pedestrian Detection in Surveillance Camera using FPGA. FPL 2019: 424-425 - [c4]Youki Sada, Masayuki Shimoda, Akira Jinguji, Hiroki Nakahara:
A Dataflow Pipelining Architecture for Tile Segmentation with a Sparse MobileNet on an FPGA. FPT 2019: 267-270 - 2018
- [j1]Akira Jinguji, Shimpei Sato, Hiroki Nakahara:
An FPGA Realization of a Random Forest with k-Means Clustering Using a High-Level Synthesis Design. IEICE Trans. Inf. Syst. 101-D(2): 354-362 (2018) - [c3]Akira Jinguji, Tomoya Fujii, Shimpei Sato, Hiroki Nakahara:
An FPGA Realization of OpenPose Based on a Sparse Weight Convolutional Neural Network. FPT 2018: 310-313 - 2017
- [c2]Hiroki Nakahara, Akira Jinguji, Simpei Sato, Tsutomu Sasao:
A Random Forest Using a Multi-valued Decision Diagram on an FPGA. ISMVL 2017: 266-271 - 2016
- [c1]Hiroki Nakahara, Akira Jinguji, Tomonori Fujii, Simpei Sato:
An acceleration of a random forest classification using Altera SDK for OpenCL. FPT 2016: 289-292
Coauthor Index
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