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Xiangdong Luo
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2020 – today
- 2023
- [j3]Jiaqing Zhao, Jianwei Zhang, Yang Zhang, Cheng Liu, Zhennan Xi, Xiangdong Luo:
An 18-bit 1-GS/s time interleaved analog-to-digital converter with timing skew calibration based on an adaptive genetic algorithm. Int. J. Circuit Theory Appl. 51(11): 5470-5483 (2023) - 2022
- [j2]Zhang Jianwei, Yuxiang Zhou, Jiaqing Zhao, Niu Guangshan, Xiangdong Luo:
Joint Error Estimation and Calibration Method of Memory Nonlinear Mismatch for a Four-Channel 16-Bit TIADC System. Sensors 22(7): 2427 (2022) - 2021
- [j1]Niu Guangshan, Liu Cong, Zhang Jianwei, Xuetao Li, Xiangdong Luo:
Research progress of time-interleaved analog-to-digital converters. Integr. 81: 313-321 (2021)
2010 – 2019
- 2015
- [c1]Chunpei Li, Xiangdong Luo, Huajian Wang:
Design of Serial Communication Module Based on Solar-Blind UV Communication System. ICIC (1) 2015: 206-215
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last updated on 2024-04-25 05:54 CEST by the dblp team
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