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2020 – today
- 2022
[c6]Dennis Abts, Garrin Kimmell, Andrew C. Ling, John Kim, Matthew Boyd, Andrew Bitar, Sahil Parmar, Ibrahim Ahmed, Roberto DiCecco, David Han, John Thompson, Michael Bye, Jennifer Hwang, Jeremy Fowers, Peter Lillian, Ashwin Murthy, Elyas Mehtabuddin, Chetan Tekur, Thomas Sohmers, Kris Kang, Stephen Maresh, Jonathan Ross:
A software-defined tensor streaming multiprocessor for large-scale machine learning. ISCA 2022: 567-580
2010 – 2019
- 2018
- [c5]Mohamed S. Abdelfattah, David Han, Andrew Bitar, Roberto DiCecco, Shane O'Connell, Nitika Shanker, Joseph Chu, Ian Prins, Joshua Fender, Andrew C. Ling, Gordon R. Chiu:
DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration. FPL 2018: 411-418 - [c4]Andrew C. Ling, Mohamed S. Abdelfattah, Shane O'Connell, Andrew Bitar, David Han, Roberto DiCecco, Suchit Subhaschandra, Chris N. Johnson, Dmitry Denisenko, Joshua Fender, Gordon R. Chiu:
Harnessing Numerical Flexibility for Deep Learning on FPGAs. HEART 2018: 1:1-1:3 - [i2]Mohamed S. Abdelfattah, David Han, Andrew Bitar, Roberto DiCecco, Shane O'Connell, Nitika Shanker, Joseph Chu, Ian Prins, Joshua Fender, Andrew C. Ling, Gordon R. Chiu:
DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration. CoRR abs/1807.06434 (2018) - 2017
- [c3]Roberto DiCecco, Lin Sun, Paul Chow:
FPGA-based training of convolutional neural networks with a reduced precision floating-point library. FPT 2017: 239-242 - 2016
- [c2]Roberto DiCecco, Griffin Lacey, Jasmina Vasiljevic, Paul Chow, Graham W. Taylor, Shawki Areibi:
Caffeinated FPGAs: FPGA framework For Convolutional Neural Networks. FPT 2016: 265-268 - [i1]Roberto DiCecco, Griffin Lacey, Jasmina Vasiljevic, Paul Chow, Graham W. Taylor, Shawki Areibi:
Caffeinated FPGAs: FPGA Framework For Convolutional Neural Networks. CoRR abs/1609.09671 (2016) - 2014
- [c1]Roberto DiCecco, Roman Pahuta, Chris D. Holdenried, Saman Sadr:
Test considerations for jitter tolerance of wireline receivers. CCECE 2014: 1-5
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