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2010 – 2019
- 2016
[c8]Javier Jalle, Mikel Fernández
, Jaume Abella, Jan Andersson, Mathieu Patte, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
Contention-aware performance monitoring counte support for real-time MPSoCs. SIES 2016: 262-271- [c7]Javier Jalle, Eduardo Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems. SIES 2016: 272-279 - 2015
- [c6]Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Tullio Vardanega, Francisco J. Cazorla:
Seeking Time-Composable Partitions of Tasks for COTS Multicore Processors. ISORC 2015: 208-217 - [c5]Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
Introduction to partial time composability for COTS multicores. SAC 2015: 1955-1956 - 2014
- [c4]Javier Jalle, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
AHRB: A high-performance time-composable AMBA AHB bus. RTAS 2014: 225-236 - [c3]Javier Jalle, Eduardo Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study. RTSS 2014: 207-217 - 2013
- [c2]Javier Jalle, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
Deconstructing bus access control policies for Real-Time multicores. SIES 2013: 31-38 - 2012
- [c1]Mikel Fernández, Roberto Gioiosa, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
Assessing the suitability of the NGMP multi-core processor in the space domain. EMSOFT 2012: 175-184
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