default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDMicroelectronics Journal, Volume 75
Volume 75, May 2018
- Rania Mohamad Abdallah, Ahmed A. S. Dessouki, Moustafa H. Aly
:
The Resonant Tunneling Diode characterization for high frequency communication systems. 1-14 - Guoxiao Cheng, Zhiqun Li, Lei Luo, Zeng-Qi Wang, Xiaodong He, Boyong He:
A low power and high gain current-reused LNA using cascaded L-type input matching network. 15-26 - Jie Jin:
Programmable multi-direction fully integrated chaotic oscillator. 27-34 - Esrafil Jedari, Rashid Rashidzadeh, Mehrdad Saif:
A PVT resilient short-time measurement solution for on-chip testing. 35-40 - Zhan Shi, Lan Luo, Menglei Lei, Tao Su:
A model for the jitter of a ring oscillator under sinusoidal interference on the power supply. 41-51 - Abdollah Eskandarian, Z. Rajeyan, H. Ebrahimnezhad:
Analysis and simulation of Single Electron Transistor as an analogue frequency doubler. 52-60 - George Souliotis, Fotis C. Plessas, Spyridon Vlassis:
A high accuracy voltage reference generator. 61-67 - Changqing Xu, Yi Liu, Shuai Ma, Yintang Yang:
Low power and reliable interconnection with combination of Crosstalk Avoidance Green Coding and capacitively charge-sharing transmitter for network-on-chip. 68-74 - Chetan Vudadha, Sai Phaneendra Parlapalli, M. B. Srinivas:
Energy efficient design of CNFET-based multi-digit ternary adders. 75-86 - Mostafa N. Sabry, Hesham Omran, Mohamed Dessouky:
Systematic design and optimization of operational transconductance amplifier using gm/ID design methodology. 87-96 - Mostafa Shaterian, Christopher M. Twigg:
Synthesis of a reconfigurable analog vector-sum circuit into the MTL-Based configurable blocks. 97-104 - Chengying Chen, Liming Chen, Xinghua Wang, Feng Zhang:
A 0.6V, 8.4uW AFE circuit for biomedical signal recording. 105-112 - Mohamed Abouelatta-Ebrahim, Ahmed Shaker, Christian Gontrand:
Impact of TSV location in HVIC on CMOS operation: A mixed-mode TCAD simulation study. 113-118 - Rodrigo Barros da Silva, Lucas C. D'Eça, Matheus Neves Carvalho, Edson Pinto Santana, Ana Isabela Araújo Cunha:
CMOS analog filter design using the Proportional Source Transconductances Integrator. 119-127 - Yanbo Zhang, Yani Li, Zhangming Zhu:
A charge-sharing switching scheme for SAR ADCs in biomedical applications. 128-136 - Jérémy Hyvert, David Cordeau, Jean-Marie Paillot:
Analysis and design of a very low phase-noise Ku-band coupled VCO using a modified cascode architecture in 0.25 μm SiGe: C BiCMOS technology. 137-146 - Qin Li, Yuntao Wu, Huifeng Zhu, Qi Wei, Fei Qiao, Sheng Zhang, Huazhong Yang:
High linearity source-follower buffer based analog memory for analog convolutional neural network. 147-152 - Rajashree Das, Srimanta Baishya:
Analytical model of surface potential and threshold voltage in gate-drain overlap FinFET. 153-159
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-03-21 23:50 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
