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ORCID12th FDL 2009: Sophia Antipolis, France
- Forum on specification and Design Languages, FDL 2009, September 22-24, 2009, Sophia Antipolis, France, Proceedings. IEEE 2009, ISBN 978-2-9530504-1-7
- Jan Langer, Ulrich Heinkel:
High level synthesis using operation properties. 1-6 - Minh D. Nguyen, Max Thalmaier, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Jörg Bormann:
A re-use methodology for formal SoC protocol compliance verification. 1-6 - Khaled Alsayeg, Katell Morin-Allory, Laurent Fesquet:
RAT-based formal verification of QDI asynchronous controllers. 1-6 - Robert Wille, Daniel Große, Finn Haedicke, Rolf Drechsler:
SMT-based stimuli generation in the SystemC Verification library. 1-6 - Luca Ferro, Laurence Pierre:
ISIS: Runtime verification of TLM platforms. 1-6 - Fernando Herrera, Eugenio Villar:
Local application of simulation directed for Exhaustive Coverage of Schedulings of SystemC specifications. 1-6 - Hans-Peter Löb, Christian Sauer:
Exploration of embedded memories in SoCs using SystemC-based functional performance models. 1-6 - Bayram Kurumahmut, Gökhan Kabukcu, Roza Ghamari, Arda Yurdakul:
Design automation model for application-specific processors on reconfigurable fabric. 1-6 - Marko Rößler, Hailu Wang, Ulrich Heinkel, Nur Engin, Wolfram Drescher:
Rapid prototyping of a DVB-SH turbo decoder using high-level-synthesis. 1-6 - Anthony Barreteau, Sébastien Le Nours, Olivier Pasquier, Jean Paul Calvez:
Transaction level modeling of an adaptive multi-standard and multi-application radio communication system. 1-6 - Marius Monton, Jordi Carrabina, Mark Burton:
Mixed simulation kernels for high performance virtual platforms. 1-6 - Marius Monton, Jakob Engblom, Mark Burton:
Checkpoint and Restore for SystemC models. 1-6 - Jun Ye, Tun Li, QingPing Tan:
The application of Aspectual Feature Module in the development and verification of SystemC models. 1-6 - Tomasz Toczek, Dominique Houzet, Stéphane Mancini:
Another take on functional system-level design and modeling. 1-6 - Martin Streubühr, Jens Gladigau, Christian Haubelt, Jürgen Teich:
Efficient approximately-timed performance modeling for architectural exploration of MPSoCs. 1-6 - Michael Karner, Christian Steger, Reinhold Weiss, Eric Armengaud:
Optimizing HW/SW Co-simulation based on run-time model switching. 1-6 - Yaseen Zaidi, Christoph Grimm, Jan Haase:
Fast and unified SystemC AMS - HDL simulation. 1-6 - Torsten Mähne, Alain Vachoux, Frédéric Giroud, Matteo Contaldo:
A VHDL-AMS modeling methodology for top-down/bottom-up design of RF systems. 1-7 - Monica Rafaila, Christoph Decker, Georg Pelz, Christian Grimm:
Design of experiments for effective pre-silicon verification of automotive electronics. 1-6 - Guillaume Terrasson, Renaud Briand, Skandar Basrour, Valérie Dupé:
A top-down approach for the design of low-power microsensor nodes for wireless sensor network. 1-6 - Tom J. Kazmierski, Dafeng Zhou, Bashir M. Al-Hashimi:
HSPICE implementation of a numerically efficient model of CNT transistor. 1-5 - Maxim Smirnov, Andres Takach:
A SystemC superset for high-level synthesis. 1-6 - Bijoy Antony Jose, Jason Pribble, Lemaire Stewart, Sandeep K. Shukla:
EmCodeSyn: A visual framework for multi-rate data flow specifications and code synthesis for embedded applications. 1-6 - H. Gregor Molter, André Seffrin, Sorin Alexander Huss:
DEVS2VHDL: Automatic transformation of XML-specified DEVS Model of Computation into synthesizable VHDL code. 1-6 - Joachim Haase, Ewald Hessel, Heinz-Theo Mammen:
Proposal to extend frequency domain analysis in VHDL-AMS. 1-4 - Adán Kohler, Martin Radetzki:
A SystemC TLM2 model of communication in wormhole switched Networks-On-Chip. 1-4 - M. Cheikhwafa, Sébastien Le Nours, Olivier Pasquier, Jean Paul Calvez:
Transaction level modeling of a FlexRay communication network. 1-4 - Markus Winterholer, Florian Schäfer:
Reuse of a HW/SW coverification environment during the refinement process of a functional C model down to an executable HW/SW specification. 1-4 - Abdulhadi Shoufan, Sorin Alexander Huss:
Understanding physical models in VHDL-AMS. 1-4 - Rami Khouri, Benjamin Nicolle, Lucas Alves Da Silva, William Tatinian, Gilles Jacquemod:
Evaluation of SystemC-AMS modeling capabilities of RF front-end non-linearities: satellite receiver case study. 1-4 - Alain Greiner, Etienne Faure, Nicolas Pouillon, Daniela Genius:
A generic hardware / software communication middleware for streaming applications on shared memory multi processor systems-on-chip. 1-4 - Massimo Conti, Giovanni B. Vece, Sara Colazilli:
Extension of SystemC framework towards power analysis. 1-4 - Chenxu Zhao, Tom J. Kazmierski:
Analysis of sense finger dynamics for accurate ΣΔ MEMS accelerometer modelling in VHDL-AMS. 1-4 - Jan Haase, Markus Damm, Johann Glaser, Javier Moreno, Christoph Grimm:
SystemC-based power simulation of wireless sensor networks. 1-4 - Luis Gabriel Murillo, Marcello Mura, Mauro Prevostini:
Semi-automated Hw/Sw Co-design for embedded systems: from MARTE models to SystemC simulators. 1-6 - Subayal Khan, Susanna Pantsar-Syväniemi, Jari Kreku, Kari Tiensyrjä, Juha-Pekka Soininen:
Linking GENESYS application architecture modelling with platform performance simulation. 1-6 - Aamir Mehut Khan, Frédéric Mallet, Charles André, Robert de Simone:
IP-XACT components with abstract time characterization. 1-6
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