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Haruka Sasaki

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2000 – 2009

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2005
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Masanori Hariyama, Haruka Sasaki, Michitaka Kameyama:
Architecture of a Stereo Matching VLSI Processor Based on Hierarchically Parallel Memory Access. IEICE Trans. Inf. Syst. 88-D(7): 1486-1491 (2005)
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Masanori Hariyama, Yasuhiro Kobayashi, Haruka Sasaki, Michitaka Kameyama:
FPGA Implementation of a Stereo Matching Processor Based on Window-Parallel-and-Pixel-Parallel Architecture. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3516-3522 (2005)

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