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Xing Qin
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2020 – today
- 2024
- [j5]Xing Qin, Jianhua Hu, Shuangge Ma, Mengyun Wu:
Estimation of multiple networks with common structures in heterogeneous subgroups. J. Multivar. Anal. 202: 105298 (2024) - 2023
- [j4]Xing Qin, Chenxiao Lai, Zejun Pan, Mingzhong Pan, Yun Xiang, Yikun Wang:
Recognition of Abnormal-Laying Hens Based on Fast Continuous Wavelet and Deep Learning Using Hyperspectral Images. Sensors 23(7): 3645 (2023) - 2021
- [j3]Mengyun Wu, Xing Qin, Shuangge Ma:
GEInter: an R package for robust gene-environment interaction analysis. Bioinform. 37(20): 3691-3692 (2021)
2010 – 2019
- 2019
- [c8]Xuecong Li, Qian He, Bingcheng Jiang, Xing Qin, Kuangyu Qin:
BTS-PD: A Blockchain Based Traceability System for P2P Distribution. BlockSys 2019: 607-620 - 2016
- [j2]Weihua Wu, Jing Jiang, Weijian Liu, Xun Feng, Lan Gao, Xing Qin:
Augmented state GM-PHD filter with registration errors for multi-target tracking by Doppler radars. Signal Process. 120: 117-128 (2016) - 2014
- [j1]Zhi Zhang, Zhonghai Lu, Vardan Saakian, Xing Qin, Qiang Chen, Li-Rong Zheng:
Item-Level Indoor Localization With Passive UHF RFID Based on Tag Interaction Analysis. IEEE Trans. Ind. Electron. 61(4): 2122-2135 (2014) - 2011
- [c7]Minyong Wan, Xing Qin, Lenian He:
Background modeling using mixture of Gaussians and Laplacian pyramid decomposition. SoCPaR 2011: 33-38
2000 – 2009
- 2007
- [c6]Jianying Peng, Xing Qin, Dexian Li, Xiaolang Yan, Xiexiong Chen:
An Efficient SIMD Architecture with Parallel Memory for 2D Cosine Transforms of Video Coding. ASAP 2007: 260-265 - [c5]Chunyue Liu, Xiaolang Yan, Xing Qin:
An optimized linear skewing interleave scheme for on-chip multi-access memory systems. ACM Great Lakes Symposium on VLSI 2007: 8-13 - [c4]Chunyue Liu, Xing Qin, Xiaolang Yan:
Explicit data organization SIMD instruction set architecture for media processors. Parallel and Distributed Computing and Networks 2007: 212-217 - 2006
- [c3]Jianying Peng, Xing Qin, Jian Yang, Xiaolang Yan, Xiexiong Chen:
A Programmable Bitstream Parser for Multiple Video Coding Standards. ICICIC (3) 2006: 609-612 - 2005
- [c2]Xing Qin, Xiaolang Yan, Haitong Ge, Ye Yang:
A simplified algorithm of JPEG2000 rate control for VLSI implementation. ISCAS (6) 2005: 6316-6319 - 2004
- [c1]Xing Qin, Xiaolang Yan, Chong-Peng Yang, Yang Ye:
Tiling artifact reduction for JPEG2000 image at low bit-rate. ICME 2004: 1419-1422
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