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2020 – today
- 2023
[i1]Chih-Ning Tsai, Pei-Wen Yang, Tzu-Yen Huang, Jung-Chih Chen, Hsin-Yi Tseng, Che-Wei Wu, Amrit Sarmah, Tzu-En Lin:
Deep Learning-Enabled Swallowing Monitoring and Postoperative Recovery Biosensing System. CoRR abs/2312.09429 (2023)
2010 – 2019
- 2014
- [c5]Meng-Fan Chang, Che-Wei Wu, Jui-Yu Hung, Ya-Chin King, Chomg-Jung Lin, Mon-Shu Ho, Chia-Cheng Kuo, Shyh-Shyuan Sheu:
A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chips. APCCAS 2014: 695-698 - 2013
- [j4]Meng-Fan Chang, Shin-Jang Shen, Chia-Chi Liu, Che-Wei Wu, Yu-Fan Lin, Ya-Chin King, Chorng-Jung Lin, Hung-Jen Liao, Yu-Der Chih, Hiroyuki Yamauchi
:
An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory. IEEE J. Solid State Circuits 48(3): 864-877 (2013) - [j3]Meng-Fan Chang, Shyh-Shyuan Sheu, Ku-Feng Lin, Che-Wei Wu, Chia-Chen Kuo, Pi-Feng Chiu, Yih-Shan Yang, Yu-Sheng Chen, Heng-Yuan Lee, Chen-Hsin Lien, Frederick T. Chen, Keng-Li Su, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai:
A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes. IEEE J. Solid State Circuits 48(3): 878-891 (2013) - [j2]Meng-Fan Chang, Che-Wei Wu, Chia-Chen Kuo, Shin-Jang Shen, Sue-Meng Yang, Ku-Feng Lin, Wen-Chao Shen, Ya-Chin King, Chorng-Jung Lin, Yu-Der Chih:
A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro. IEEE J. Solid State Circuits 48(9): 2250-2259 (2013) - [c4]Shiunn-Jang Chern, Che-Wei Wu, Ching-Tang Hsieh:
Degradation algorithm of compressive sensing for integer DCT with application to H. 264/AVC. ISPACS 2013: 42-46 - 2012
- [j1]Pi-Feng Chiu, Meng-Fan Chang, Che-Wei Wu, Ching-Hao Chuang, Shyh-Shyuan Sheu, Yu-Sheng Chen, Ming-Jinn Tsai:
Low Store Energy, Low VDDmin, 8T2R Nonvolatile Latch and SRAM With Vertical-Stacked Resistive Memory (Memristor) Devices for Low Power Mobile Applications. IEEE J. Solid State Circuits 47(6): 1483-1496 (2012) - [c3]Meng-Fan Chang, Che-Wei Wu, Chia-Chen Kuo, Shin-Jang Shen, Ku-Feng Lin, Shu-Meng Yang, Ya-Chin King, Chorng-Jung Lin, Yu-Der Chih:
A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time. ISSCC 2012: 434-436 - 2011
- [c2]Shyh-Shyuan Sheu, Meng-Fan Chang, Ku-Feng Lin, Che-Wei Wu, Yu-Sheng Chen, Pi-Feng Chiu, Chia-Chen Kuo, Yih-Shan Yang, Pei-Chia Chiang, Wen-Pin Lin, Che-He Lin, Heng-Yuan Lee, Peiyi Gu, Sumin Wang, Frederick T. Chen, Keng-Li Su, Chen-Hsin Lien, Kuo-Hsing Cheng, Hsin-Tun Wu, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai:
A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability. ISSCC 2011: 200-202 - [c1]Meng-Fan Chang, Shin-Jang Shen, Chia-Chi Liu, Che-Wei Wu, Yu-Fan Lin, Shang-Chi Wu, Chia-En Huang, Han-Chao Lai, Ya-Chin King, Chorng-Jung Lin, Hung-Jen Liao, Yu-Der Chih, Hiroyuki Yamauchi:
An offset-tolerant current-sampling-based sense amplifier for Sub-100nA-cell-current nonvolatile memory. ISSCC 2011: 206-208
Coauthor Index
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