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ORCIDYoshihiro Hayashi
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2020 – today
- 2024
[i3]Kohei Noda, Araki Wakiuchi, Yoshihiro Hayashi, Ryo Yoshida:
Advancing Extrapolative Predictions of Material Properties through Learning to Learn. CoRR abs/2404.08657 (2024)- [i2]Shunya Minami, Yoshihiro Hayashi, Stephen Wu, Kenji Fukumizu, Hiroki Sugisawa, Masashi Ishii, Isao Kuwajima, Kazuya Shiratori, Ryo Yoshida:
Scaling Law of Sim2Real Transfer Learning in Expanding Computational Materials Databases for Real-World Predictions. CoRR abs/2408.04042 (2024) - 2023
- [j10]Mitsuru Ohno
, Yoshihiro Hayashi, Qi Zhang, Yu Kaneko, Ryo Yoshida:
SMiPoly: Generation of a Synthesizable Polymer Virtual Library Using Rule-Based Polymerization Reactions. J. Chem. Inf. Model. 63(17): 5539-5548 (2023) - [c13]Shunya Minami, Kenji Fukumizu, Yoshihiro Hayashi, Ryo Yoshida:
Transfer Learning with Affine Model Transformation. NeurIPS 2023 - 2022
- [j9]Shinya Kajiyama, Yutaka Igarashi, Toru Yazaki, Yusaku Katsube, Takuma Nishimoto, Tatsuo Nakagawa, Yohei Nakamura, Yoshihiro Hayashi, Takuya Kaneko, Hiroki Ishikuro, Taizo Yamawaki:
T/R Switch Composed of Three HV-MOSFETs With 12.1-μW Consumption That Enables Per-Channel Self-Loopback AC Tests and -18.1-dB Switching Noise Suppression for 3-D Ultrasound Imaging With 3072-Ch Transceiver. IEEE Trans. Very Large Scale Integr. Syst. 30(2): 153-165 (2022) - [i1]Shunya Minami, Kenji Fukumizu, Yoshihiro Hayashi, Ryo Yoshida:
Transfer learning with affine model transformation. CoRR abs/2210.09745 (2022) - 2020
- [j8]Kakeru Narita, Teruhisa Hochin, Yoshihiro Hayashi, Hiroki Nomiya:
Incremental Hierarchical Clustering for Data Insertion and Its Evaluation. Int. J. Softw. Innov. 8(2): 1-22 (2020) - [j7]Ryoma Sasaki, Yoshihiro Hayashi, Susumu Kawauchi:
Acceleration of Liquid-Crystalline Phase Transition Simulations Using Selectively Scaled and Returned Molecular Dynamics. J. Chem. Inf. Model. 60(7): 3499-3507 (2020)
2010 – 2019
- 2019
- [j6]Yutaka Igarashi, Shinya Kajiyama, Yusaku Katsube, Takuma Nishimoto, Tatsuo Nakagawa, Yasuyuki Okuma, Yohei Nakamura, Takahide Terada, Taizo Yamawaki, Toru Yazaki, Yoshihiro Hayashi, Kazuhiro Amino, Takuya Kaneko, Hiroki Tanaka:
Single-Chip 3072-Element-Channel Transceiver/128-Subarray-Channel 2-D Array IC With Analog RX and All-Digital TX Beamformer for Echocardiography. IEEE J. Solid State Circuits 54(9): 2555-2567 (2019) - [c12]Shinya Kajiyama, Yutaka Igarashi, Toru Yazaki, Yusaku Katsube, Takuma Nishimoto, Tatsuo Nakagawa, Yohei Nakamura, Yoshihiro Hayashi, Taizo Yamawaki:
T/R-Switch Composed of 3 High-Voltage MOSFETs with 12.1 µW Consumption that can Perform Per-channel TX to RX Self-Loopback AC Tests for 3D Ultrasound Imaging with 3072-channel Transceiver. A-SSCC 2019: 305-308 - [c11]Kakeru Narita, Teruhisa Hochin, Yoshihiro Hayashi, Hiroki Nomiya:
Improvement of Incremental Hierarchical Clustering Algorithm by Re-insertion. CSII (selected papers) 2019: 105-120 - 2017
- [c10]Yusaku Katsube, Shinya Kajiyama, Takuma Nishimoto, Tatsuo Nakagawa, Yasuyuki Okuma, Yohei Nakamura, Takahide Terada, Yutaka Igarashi, Taizo Yamawaki, Toru Yazaki, Yoshihiro Hayashi, Kazuhiro Amino, Takuya Kaneko, Hiroki Tanaka:
27.6 Single-chip 3072ch 2D array IC with RX analog and all-digital TX beamformer for 3D ultrasound imaging. ISSCC 2017: 458-459 - 2015
- [c9]Tomohiro Sano, Masakazu Mizokami, Hiroaki Matsui, Keisuke Ueda, Kenichi Shibata, Kenji Toyota, Tatsuhito Saitou, Hisayasu Sato, Koichi Yahagi, Yoshihiro Hayashi:
13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching network. ISSCC 2015: 1-3 - [c8]Makoto Ueki, K. Takeuchi, T. Yamamoto, Akira Tanabe, N. Ikarashi, M. Saitoh, T. Nagumo, Hiroshi Sunamura, Mitsuru Narihiro, Kazuya Uejima, Koji Masuzaki, Naoya Furutake, S. Saito, Y. Yabe, Akira Mitsuiki, Koichi Takeda, Takashi Hase, Yoshihiro Hayashi:
Low-power embedded ReRAM technology for IoT applications. VLSIC 2015: 108- - 2012
- [j5]Yoshifumi Ikenaga, Masahiro Nomura, Shuji Suenaga, Hideo Sonohara, Yoshitaka Horikoshi, Toshiyuki Saito, Yukio Ohdaira, Yoichiro Nishio, Tomohiro Iwashita, Miyuki Satou, Koji Nishida, Koichi Nose, Koichiro Noguchi, Yoshihiro Hayashi, Masayuki Mizuno:
A 27% Active-Power-Reduced 40-nm CMOS Multimedia SoC With Adaptive Voltage Scaling Using Distributed Universal Delay Lines. IEEE J. Solid State Circuits 47(4): 832-840 (2012) - 2011
- [j4]Koichi Takeda, Toshio Saito, Shinobu Asayama, Yoshiharu Aimoto, Hiroyuki Kobatake, Shinya Ito, Toshifumi Takahashi, Masahiro Nomura, Kiyoshi Takeuchi, Yoshihiro Hayashi:
Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs. IEEE J. Solid State Circuits 46(4): 806-814 (2011) - [j3]Akira Tanabe, Ken'ichiro Hijioka, Hirokazu Nagase, Yoshihiro Hayashi:
A Novel Variable Inductor Using a Bridge Circuit and Its Application to a 5-20 GHz Tunable LC-VCO. IEEE J. Solid State Circuits 46(4): 883-893 (2011)
2000 – 2009
- 2009
- [c7]Yoshihiro Hayashi, Hiroshi Tsuji, Ryosuke Saga:
Visualizing Method based on Item Sales Records and its Experimentation. SMC 2009: 524-528 - 2008
- [c6]Ryosuke Saga, Yoshihiro Hayashi, Hiroshi Tsuji:
Hotel recommender system based on user's preference transition. SMC 2008: 2437-2442 - 2007
- [j2]Noriaki Oda, Hironori Imura, Naoyoshi Kawahara, Masayoshi Tagami, Hiroyuki Kunishima, Shuji Sone, Sadayuki Ohnishi, Kenta Yamada, Yumi Kakuhara, Makoto Sekine, Yoshihiro Hayashi, Kazuyoshi Ueno:
Chip-Level Performance Maximization Using ASIS (Application-Specific Interconnect Structure) Wiring Design Concept for 45 nm CMOS Generation. IEICE Trans. Electron. 90-C(4): 848-855 (2007) - 2006
- [c5]Akira Tanabe, Ken'ichiro Hijioka, Yoshihiro Hayashi:
A Novel Monitoring Method of RF Characteristics Variations for Sub-0.1μm MOSFETs with Precise Gate-resistance Model. CICC 2006: 725-728
1990 – 1999
- 1998
- [c4]Shuji Takahashi, Masato Edahiro, Yoshihiro Hayashi:
A New LSI Performance Prediction Model for Interconnection Analysis of Future LSIs. ASP-DAC 1998: 51-56 - [c3]Tohru Miwa, Junichi Yamada, Yuji Okamoto, Hiroki Koike, Hideo Toyoshiina, Hiromitsu Hada, Yoshihiro Hayashi, Hiroaki Oliizaki, Yoichi Miyasalca, Takemitsu Kunio, Hidenobu Miyamoto, Hideki Gomi, Hiroshi Kitajima:
An embedded FeRAM macro cell for a smart card microcontroller. CICC 1998: 439-442 - 1990
- [c2]Masahiro Tomita, Hong-Hai Jiang, Tamotsu Yamamoto, Yoshihiro Hayashi:
An Algorithm for Locating Logic Design Errors. ICCAD 1990: 468-471 - [c1]Gotaro Odawara, Masahiro Tomita, Honghai Jiang, Yutaka Tamiya, Taisei Yoshino, Yoshihiro Hayashi, Satoru Maruyama, Guixin Cheng, Hidetoshi Sakaki:
A multiprocessor system for multiple image recognition-application to automatic routing system. ICPR (2) 1990: 432-435
1980 – 1989
- 1984
- [j1]Hiroshi Fukinuki, Takeshi Ito, Mamoru Aiki, Yoshihiro Hayashi:
The FS-400M Submarine System. IEEE J. Sel. Areas Commun. 2(6): 794-800 (1984)
Coauthor Index
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