default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDVolkan Kursun
Person information
SPARQL queries 
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2022
[c73]Anil Kumar Gundu, Volkan Kursun:
Impact of Sheet Width and Silicon Height in 3D Stacked Nanosheet GAA Transistor Technology. ISCAS 2022: 2547-2550- 2021
- [j42]Anil Kumar Gundu, Volkan Kursun
:
Novel low leakage and energy efficient dual-pullup/dual-pulldown repeater. Integr. 78: 110-117 (2021) - [c72]Anil Kumar Gundu, Volkan Kursun:
Optimization of 3D Stacked Nanosheets in 5nm Gate-all-around Transistor Technology. SoCC 2021: 25-28 - 2020
- [j41]Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun:
Monolithic 3D Carbon Nanotube Memory for Enhanced Yield and Integration Density. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(7): 2431-2441 (2020)
2010 – 2019
- 2019
- [j40]Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark M. Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber:
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 253-280 (2019) - [j39]Anil Kumar Gundu, Volkan Kursun:
Low Leakage Clock Tree With Dual-Threshold- Voltage Split Input-Output Repeaters. IEEE Trans. Very Large Scale Integr. Syst. 27(7): 1537-1547 (2019) - [c71]Jiachen Jiang, Yanan Sun, Weifeng He, Zhigang Mao, Volkan Kursun:
Carbon-Based Three-Dimensional SRAM Cell with Minimum Inter-Layer Area Skew Considering Process imperfections. ASICON 2019: 1-4 - [c70]Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun:
Statistical Modeling and Design of a 16nm 9T SRAM Cell Considering Post-Synthesis Removal of Metallic Carbon-Nanotubes. ICEIC 2019: 1-2 - [c69]Anil Kumar Gundu, Volkan Kursun:
Energy Efficient Clock Distribution with Low-Leakage Multi-Vt Buffers. PATMOS 2019: 113-118 - 2017
- [j38]Yanan Sun, Weifeng He, Zhigang Mao, Volkan Kursun:
Variable strength keeper for high-speed and low-leakage carbon nanotube domino logic. Microelectron. J. 62: 12-20 (2017) - [c68]Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun:
Metallic-carbon-nanotube-removal tolerant SRAM cell with 9 transistors. ASICON 2017: 908-911 - 2016
- [j37]Hailong Jiao, Yongmin Qiu, Volkan Kursun:
Variability-aware 7T SRAM circuit with low leakage high data stability SLEEP mode. Integr. 53: 68-79 (2016) - [j36]Shairfe Muhammad Salahuddin, Volkan Kursun:
Write Assist SRAM Cell with Asymmetrical Bitline Access Transistors for Enhanced Data Stability and Write Ability. J. Circuits Syst. Comput. 25(1): 1640009:1-1640009:19 (2016) - [j35]Hailong Jiao, Yongmin Qiu, Volkan Kursun:
Low power and robust memory circuits with asymmetrical ground gating. Microelectron. J. 48: 109-119 (2016) - [c67]Hailong Jiao, Yongmin Qiu, Volkan Kursun:
Variations-tolerant 9T SRAM circuit with robust and low leakage SLEEP mode. IOLTS 2016: 39-42 - 2015
- [j34]Yanan Sun, Hailong Jiao, Volkan Kursun:
A Novel Robust and Low-Leakage SRAM Cell With Nine Carbon Nanotube Transistors. IEEE Trans. Very Large Scale Integr. Syst. 23(9): 1729-1739 (2015) - [c66]Yanan Sun, Volkan Kursun:
Carbon-based sleep switch dynamic logic circuits with variable strength keeper for lower-leakage currents and higher-speed. ISCAS 2015: 2720-2723 - [c65]Hong Zhu, Volkan Kursun:
2-Phase high-frequency clock distribution with SPLIT-IO dual-Vt repeaters for suppressed leakage currents. ISCAS 2015: 2932-2935 - 2014
- [j33]Hailong Jiao, Volkan Kursun:
Mode transition timing and energy overhead analysis in noise-aware MTCMOS circuits. Microelectron. J. 45(8): 1125-1131 (2014) - [j32]Yanan Sun, Volkan Kursun:
Carbon Nanotubes Blowing New Life Into NP Dynamic CMOS Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(2): 420-428 (2014) - [j31]Hong Zhu, Volkan Kursun:
A Comprehensive Comparison of Data Stability Enhancement Techniques With Novel Nanoscale SRAM Cells Under Parameter Fluctuations. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(5): 1473-1484 (2014) - [j30]Hong Zhu, Volkan Kursun:
Novel Low-Leakage and High-Speed Triple-Threshold-Voltage Buffers With Skewed Inputs and Outputs. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(7): 2013-2021 (2014) - [c64]Yanan Sun, Hailong Jiao, Volkan Kursun:
Low-leakage 9-CN-MOSFET SRAM cell with enhanced read and write voltage margins. ICM 2014: 164-167 - [c63]Hong Zhu, Volkan Kursun:
Triple-threshold-voltage 9-transistor SRAM cell for data stability and energy-efficiency at ultra-low power supply voltages. ICM 2014: 176-179 - [c62]Hong Zhu, Volkan Kursun:
A comprehensive comparison of superior triple-threshold-voltage 7-transistor, 8-transistor, and 9-transistor SRAM cells. ISCAS 2014: 2185-2188 - [c61]Shairfe Muhammad Salahuddin, Volkan Kursun:
High-speed and low-leakage FinFET SRAM cell with enhanced read and write voltage margins. ISIC 2014: 312-315 - 2013
- [j29]Hailong Jiao, Volkan Kursun:
Reactivation Noise Suppression With Sleep Signal Slew Rate Modulation in MTCMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 21(3): 533-545 (2013) - [c60]Shairfe Muhammad Salahuddin, Volkan Kursun:
Underlap engineered eight-transistor SRAM cell for stronger data stability enhanced write ability and suppressed leakage power consumption. ICECS 2013: 25-28 - [c59]Yanan Sun, Volkan Kursun:
Low-power and compact NP dynamic CMOS adder with 16nm carbon nanotube transistors. ISCAS 2013: 2119-2122 - [c58]Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun:
Low-leakage hybrid FinFET SRAM cell with asymmetrical gate overlap / underlap bitline access transistors for enhanced read data stability. ISCAS 2013: 2331-2334 - [c57]Hong Zhu, Volkan Kursun:
Novel dual-threshold-voltage energy-efficient buffers for driving large extrinsic load capacitance. ISCAS 2013: 3000-3003 - [c56]Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun:
A novel 6T SRAM cell with asymmetrically gate underlap engineered FinFETs for enhanced read data stability and write ability. ISQED 2013: 353-358 - [c55]Hong Zhu, Volkan Kursun:
Impact of process parameter and supply voltage fluctuations on multi-threshold-voltage seven-transistor static memory cells. ISQED 2013: 448-453 - [c54]Hailong Jiao, Volkan Kursun:
Ground gated 8T SRAM cells with enhanced read and hold data stability. ISVLSI 2013: 52-57 - [c53]Khawar Sarfraz, Volkan Kursun:
Characterization of a low leakage current and high-speed 7T SRAM circuit with wide voltage margins. ISVLSI 2013: 64-69 - [c52]Hailong Jiao, Volkan Kursun:
Characterization of mode transition timing overhead for net energy savings in low-noise MTCMOS circuits. VLSI-SoC 2013: 150-155 - 2012
- [j28]Hailong Jiao, Volkan Kursun:
Threshold Voltage Tuning for Faster Activation With Lower Noise in Tri-Mode MTCMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 20(4): 741-745 (2012) - [c51]Hailong Jiao, Volkan Kursun:
Full-custom design of low leakage data preserving ground gated 6T SRAM cells to facilitate single-ended write operations. ISCAS 2012: 484-487 - [c50]Yanan Sun, Volkan Kursun:
NP dynamic CMOS resurrection with carbon nanotube field effect transistors. ISOCC 2012: 13-16 - [c49]Hailong Jiao, Volkan Kursun:
Multi-phase sleep signal modulation for mode transition noise mitigation in MTCMOS circuits. ISOCC 2012: 466-469 - 2011
- [j27]Hailong Jiao, Volkan Kursun:
Noise-Aware Data Preserving Sequential MTCMOS Circuits with Dynamic Forward Body Bias. J. Circuits Syst. Comput. 20(1): 125-145 (2011) - [j26]Sherif A. Tawfik, Volkan Kursun:
Multi-Threshold Voltage FinFET Sequential Circuits. IEEE Trans. Very Large Scale Integr. Syst. 19(1): 151-156 (2011) - [j25]Hailong Jiao, Volkan Kursun:
Ground Bouncing Noise Suppression Techniques for Data Preserving Sequential MTCMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 19(5): 763-773 (2011) - [c48]Yanan Sun, Volkan Kursun:
Leakage current and bottom gate voltage considerations in developing maximum performance 16nm N-channel carbon nanotube transistors. ISCAS 2011: 2513-2516 - [c47]Hong Zhu, Volkan Kursun:
Symmetrical triple-threshold-voltage nine-transistor SRAM circuit with superior noise immunity and overall electrical quality. ISOCC 2011: 333-336 - [c46]Hailong Jiao, Volkan Kursun:
Sleep signal slew rate modulation for mode transition noise suppression in ground gated integrated circuits. SoCC 2011: 365-370 - [c45]Yanan Sun, Volkan Kursun:
Uniform carbon nanotube diameter and nanoarray pitch for VLSI of 16nm P-channel MOSFETs. VLSI-SoC 2011: 226-231 - 2010
- [j24]Hailong Jiao, Volkan Kursun:
Low-Leakage and Compact Registers with Easy-Sleep Mode. J. Low Power Electron. 6(2): 263-279 (2010) - [j23]Hailong Jiao, Volkan Kursun:
Ground-Bouncing-Noise-Aware Combinational MTCMOS Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 2053-2065 (2010) - [j22]Sherif A. Tawfik, Volkan Kursun:
Dual Supply Voltages and Dual Clock Frequencies for Lower Clock Power and Suppressed Temperature-Gradient-Induced Clock Skew. IEEE Trans. Very Large Scale Integr. Syst. 18(3): 347-355 (2010) - [c44]Hailong Jiao, Volkan Kursun:
Smooth awakenings: Reactivation noise suppressed low-leakage and robust MTCMOS flip-flops. ISCAS 2010: 3845-3848 - [c43]Hailong Jiao, Volkan Kursun:
Tri-mode Operation for Noise Reduction and Data Preservation in Low-Leakage Multi-Threshold CMOS Circuits. VLSI-SoC (Selected Papers) 2010: 258-290 - [c42]Hailong Jiao, Volkan Kursun:
Reactivation noise suppression with threshold voltage tuning in sequential MTCMOS circuits. VLSI-SoC 2010: 347-351
2000 – 2009
- 2009
- [j21]Sherif A. Tawfik, Volkan Kursun:
Robust FinFET Memory Circuits with P-Type Data Access Transistors for Higher Integration Density and Reduced Leakage Power. J. Low Power Electron. 5(4): 497-508 (2009) - [j20]Ranjith Kumar, Volkan Kursun:
Temperature-adaptive voltage scaling for enhanced energy efficiency in subthreshold memory arrays. Microelectron. J. 40(6): 1013-1025 (2009) - [j19]Sherif A. Tawfik, Volkan Kursun:
FinFET domino logic with independent gate keepers. Microelectron. J. 40(11): 1531-1540 (2009) - [j18]Sherif A. Tawfik, Volkan Kursun:
Low Power and High Speed Multi Threshold Voltage Interface Circuits. IEEE Trans. Very Large Scale Integr. Syst. 17(5): 638-645 (2009) - 2008
- [j17]Ranjith Kumar, Zhiyu Liu, Volkan Kursun:
Technique for Accurate Power and Energy Measurement with the Computer-Aided Design Tools. J. Circuits Syst. Comput. 17(3): 399-421 (2008) - [j16]Ranjith Kumar, Volkan Kursun:
Temperature-Adaptive Energy Reduction Techniques for Nano-CMOS Circuits Displaying Reversed temperature Dependence. J. Circuits Syst. Comput. 17(3): 423-438 (2008) - [j15]Sherif A. Tawfik, Volkan Kursun:
Clock Distribution Networks with Gradual Signal Transition Time Relaxation for Reduced Power Consumption. J. Circuits Syst. Comput. 17(6): 1173-1191 (2008) - [j14]Ranjith Kumar, Volkan Kursun:
Temperature-adaptive voltage tuning for enhanced energy efficiency in ultra-low-voltage circuits. Microelectron. J. 39(12): 1714-1727 (2008) - [j13]Zhiyu Liu, Volkan Kursun:
Characterization of a Novel Nine-Transistor SRAM Cell. IEEE Trans. Very Large Scale Integr. Syst. 16(4): 488-492 (2008) - [c41]Sherif A. Tawfik, Volkan Kursun:
Multi-Vth FinFET sequential circuits with independent-gate bias and work-function engineering for reduced power consumption. APCCAS 2008: 348-351 - [c40]Sherif A. Tawfik, Volkan Kursun:
Asymmetric dual-gate multi-fin keeper bias options and optimization for low power and robust FinFET domino logic. APCCAS 2008: 1720-1723 - [c39]Sherif A. Tawfik, Volkan Kursun:
Work-function engineering for reduced power and higher integration density: An alternative to sizing for stability in FinFET memory circuits. ISCAS 2008: 788-791 - [c38]Sherif A. Tawfik, Volkan Kursun:
Low power and robust 7T dual-Vt SRAM circuit. ISCAS 2008: 1452-1455 - [c37]Sherif A. Tawfik, Volkan Kursun:
Dynamic wordline voltage swing for low leakage and stable static memory banks. ISCAS 2008: 1894-1897 - [c36]Zhiyu Liu, Sherif A. Tawfik, Volkan Kursun:
Statistical Data Stability and Leakage Evaluation of FinFET SRAM Cells with Dynamic Threshold Voltage Tuning under Process Parameter Fluctuations. ISQED 2008: 305-310 - [c35]Sherif A. Tawfik, Volkan Kursun:
Characterization of New Static Independent-Gate-Biased FinFET Latches and Flip-Flops under Process Variations. ISQED 2008: 311-316 - [c34]Sherif A. Tawfik, Volkan Kursun:
Compact FinFET Memory Circuits with P-Type Data Access Transistors for Low Leakage and Robust Operation. ISQED 2008: 855-860 - 2007
- [j12]Ranjith Kumar, Volkan Kursun:
Voltage optimization for simultaneous energy efficiency and temperature variation resilience in CMOS circuits. Microelectron. J. 38(4-5): 583-594 (2007) - [j11]Zhiyu Liu, Volkan Kursun:
PMOS-Only Sleep Switch Dual-Threshold Voltage Domino Logic in Sub-65-nm CMOS Technologies. IEEE Trans. Very Large Scale Integr. Syst. 15(12): 1311-1319 (2007) - [c33]Sherif A. Tawfik, Volkan Kursun:
Low Power and Stable FinFET SRAM with Static Independent Gate Bias for Enhanced Integration Density. ICECS 2007: 443-446 - [c32]Sherif A. Tawfik, Volkan Kursun:
Buffer Insertion and Sizing in Clock Distribution Networks with Gradual Transition Time Relaxation for Reduced Power Consumption. ICECS 2007: 845-848 - [c31]Zhiyu Liu, Volkan Kursun:
New MTCMOS Flip-Flops with Simple Control Circuitry and Low Leakage Data Retention Capability. ICECS 2007: 1276-1279 - [c30]Ranjith Kumar, Volkan Kursun:
Temperature-Adaptive Energy Reduction for Ultra-Low Power-Supply-Voltage Subthreshold Logic Circuits. ICECS 2007: 1280-1283 - [c29]Sherif A. Tawfik, Volkan Kursun:
Low-Power Low-Voltage Hot-Spot Tolerant Clocking with Suppressed Skew. ISCAS 2007: 645-648 - [c28]Zhiyu Liu, Volkan Kursun:
Charge Recycling MTCMOS for Low Energy Active/Sleep Mode Transitions. ISCAS 2007: 1389-1392 - [c27]Sherif A. Tawfik, Volkan Kursun:
Multi-Vth Level Conversion Circuits for Multi-VDD Systems. ISCAS 2007: 1397-1400 - [c26]Zhiyu Liu, Volkan Kursun:
High Read Stability and Low Leakage Cache Memory Cell. ISCAS 2007: 2774-2777 - [c25]Volkan Kursun, Sherif A. Tawfik, Zhiyu Liu:
Leakage-Aware Design of Nanometer SoC. ISCAS 2007: 3231-3234 - [c24]Sherif A. Tawfik, Volkan Kursun:
Dual signal frequencies and voltage levels for low power and temperature-gradient tolerant clock distribution. ISLPED 2007: 62-67 - [c23]Sherif A. Tawfik, Volkan Kursun:
Dual-V_DD Clock Distribution for Low Power and Minimum Temperature Fluctuations Induced Skew. ISQED 2007: 73-78 - [c22]Zhiyu Liu, Volkan Kursun:
Charge Recycling Between Virtual Power and Ground Lines for Low Energy MTCMOS. ISQED 2007: 239-244 - [c21]Zhiyu Liu, Sherif A. Tawfik, Volkan Kursun:
An independent-gate FinFET SRAM cell for high data stability and enhanced integration density. SoCC 2007: 63-66 - [c20]Sherif A. Tawfik, Volkan Kursun:
Low-power high-performance FinFET sequential circuits. SoCC 2007: 145-148 - 2006
- [j10]Zhiyu Liu, Volkan Kursun:
Sleep switch dual threshold voltage domino logic with reduced subthreshold and gate oxide leakage current. Microelectron. J. 37(8): 812-820 (2006) - [j9]Zhiyu Liu, Volkan Kursun:
Leakage Power Characteristics of Dynamic Circuits in Nanometer CMOS Technologies. IEEE Trans. Circuits Syst. II Express Briefs 53-II(8): 692-696 (2006) - [j8]Ranjith Kumar, Volkan Kursun:
Reversed Temperature-Dependent Propagation Delay Characteristics in Nanometer CMOS Circuits. IEEE Trans. Circuits Syst. II Express Briefs 53-II(10): 1078-1082 (2006) - [j7]Zhiyu Liu, Volkan Kursun:
Leakage Biased pMOS Sleep Switch Dynamic Circuits. IEEE Trans. Circuits Syst. II Express Briefs 53-II(10): 1093-1097 (2006) - [c19]Ranjith Kumar, Volkan Kursun:
A design methodology for temperature variation insensitive low power circuits. ACM Great Lakes Symposium on VLSI 2006: 410-415 - [c18]Zhiyu Liu, Volkan Kursun:
Leakage current starved domino logic. ACM Great Lakes Symposium on VLSI 2006: 428-433 - [c17]Ranjith Kumar, Volkan Kursun:
Impact of temperature fluctuations on circuit characteristics in 180nm and 65nm CMOS technologies. ISCAS 2006 - [c16]Volkan Kursun, Zhiyu Liu:
Wide temperature spectrum low leakage dynamic circuit technique for sub-65nm CMOS technologies. ISCAS 2006 - [c15]Zhiyu Liu, Volkan Kursun:
Robust Dynamic Node Low Voltage Swing Domino Logic with Multiple Threshold Voltages. ISQED 2006: 31-36 - [c14]Zhiyu Liu, Volkan Kursun:
Leakage Biased Sleep Switch Domino Logic. ISQED 2006: 318-323 - [c13]Zhiyu Liu, Volkan Kursun:
High Speed Low Swing Dynamic Circuits with Multiple Supply and Threshold Voltages. ISVLSI 2006: 59-64 - [c12]Ranjith Kumar, Volkan Kursun:
Supply and Threshold Voltage Optimization for Temperature Variation Insensitive Circuit Performance: A Comparison. SoCC 2006: 89-90 - [c11]Zhiyu Liu, Volkan Kursun:
High Read Stability and Low Leakage SRAM Cell Based on Data/Bitline Decoupling. SoCC 2006: 115-116 - 2005
- [j6]Volkan Kursun, Vivek De, Eby G. Friedman, Siva G. Narendra:
Monolithic voltage conversion in low-voltage CMOS technologies. Microelectron. J. 36(9): 863-867 (2005) - [c10]Volkan Kursun, Gerhard Schrom, Vivek De, Eby G. Friedman, Siva G. Narendra:
Cascode buffer for monolithic voltage conversion operating at high input supply voltages. ISCAS (1) 2005: 464-467 - [c9]Zhiyu Liu, Volkan Kursun:
Shifted Leakage Power Characteristics of Dynamic Circuits Due to Gate Oxide Tunneling. SoCC 2005: 151-154 - 2004
- [j5]Volkan Kursun, Siva G. Narendra, Vivek K. De, Eby G. Friedman:
Low-voltage-swing monolithic dc-dc conversion. IEEE Trans. Circuits Syst. II Express Briefs 51-II(5): 241-248 (2004) - [j4]Volkan Kursun, Eby G. Friedman:
Sleep switch dual threshold Voltage domino logic with reduced standby leakage current. IEEE Trans. Very Large Scale Integr. Syst. 12(5): 485-496 (2004) - [c8]Volkan Kursun, Eby G. Friedman:
Energy efficient dual threshold voltage dynamic circuits employing sleep switches to minimize subthreshold leakage. ISCAS (2) 2004: 417-420 - [c7]Volkan Kursun, Eby G. Friedman:
Forward body biased keeper for enhanced noise immunity in domino logic circuits. ISCAS (2) 2004: 917-920 - [c6]Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Volkan Kursun, Donald S. Gardner, Siva G. Narendra, Tanay Karnik, Vivek De:
Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation. ISLPED 2004: 263-268 - [c5]Volkan Kursun, Eby G. Friedman:
Node Voltage Dependent Subthreshold Leakage Current Characteristics of Dynamic Circuits. ISQED 2004: 104-109 - [c4]Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman:
High Input Voltage Step-Down DC-DC Converters for Integration in a Low Voltage CMOS Process. ISQED 2004: 517-521 - 2003
- [j3]David H. Albonesi, Rajeev Balasubramonian, Steve Dropsho, Sandhya Dwarkadas, Eby G. Friedman, Michael C. Huang, Volkan Kursun, Grigorios Magklis, Michael L. Scott, Greg Semeraro, Pradip Bose, Alper Buyuktosunoglu, Peter W. Cook, Stanley Schuster:
Dynamically Tuning Processor Resources with Adaptive Processing. Computer 36(12): 49-58 (2003) - [j2]Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman:
Analysis of buck converters for on-chip integration with a dual supply voltage microprocessor. IEEE Trans. Very Large Scale Integr. Syst. 11(3): 514-522 (2003) - [j1]Volkan Kursun, Eby G. Friedman:
Domino logic with variable threshold voltage keeper. IEEE Trans. Very Large Scale Integr. Syst. 11(6): 1080-1093 (2003) - [c3]Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman:
Monolithic DC-DC Converter Analysis And Mosfet Gate Voltage Optimization. ISQED 2003: 279- - 2002
- [c2]Volkan Kursun, Eby G. Friedman:
Low swing dual threshold voltage domino logic. ACM Great Lakes Symposium on VLSI 2002: 47-52 - [c1]Steve Dropsho, Volkan Kursun, David H. Albonesi, Sandhya Dwarkadas, Eby G. Friedman:
Managing static leakage energy in microprocessor functional units. MICRO 2002: 321-332
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2025-01-20 23:00 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
