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ORCIDTae-Hwan Oh
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2000 – 2009
- 2008
[c7]Tae-Hwan Oh, Ho-Young Lee, Ju-Hwa Kim, Ho-Jin Park, Kyoung-Ho Moon, Jae-Whui Kim, Hae-Seung Lee:
A 16b 10MS/s digitally self-calibrated ADC with time constant control. CICC 2008: 113-116- 2007
- [c6]Ho-Young Lee, Tae-Hwan Oh, Ho-Jin Park, Hae-Seung Lee, Mark Spaeth, Jae-Whui Kim:
A 14-b 30MS/s 0.75mm2 Pipelined ADC with On-Chip Digital Self-Calibration. CICC 2007: 313-316 - 2006
- [c5]Tae-Hwan Oh, Sang-Min Yoo, Kyoung-Ho Moon, Jae-Whui Kim:
A 3.0 V 72mW 10b 100 MSample/s Nyquist-rate CMOS pipelined ADC in 0.54 mm2. ISCAS 2006 - [c4]Sang-Min Yoo, Tae-Hwan Oh, Ho-Young Lee, Kyung-Ho Moon, Jae-Whui Kim:
A 3.0V 12b 120 Msample/s CMOS pipelined ADC. ISCAS 2006 - [c3]Hee-Cheol Choi, Ju-Wha Kim, Sang-Min Yoo, Kang-Jin Lee, Tae-Hwan Oh, Mi-Jung Seo, Jae-Whui Kim:
A 15mW 0.2mm2 50MS/s ADC with wide input range. ISSCC 2006: 842-851 - 2004
- [c2]Tae-Hwan Oh, Ho-Young Lee, Ho-Jin Park, Jae-Whui Kim:
A 1.8V 8-bit 250Msample/s Nyquist-rate CMOS pipelined ADC. ISCAS (1) 2004: 9-12 - 2002
- [c1]Sang-Min Yoo, Tae-Hwan Oh, Jung-Woong Moon, Seung-Hoon Lee, Un-Ku Moon:
A 2.5 V 10 b 120 MSample/s CMOS pipelined ADC with high SFDR. CICC 2002: 441-444
Coauthor Index
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