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ORCIDMitsuharu Nakazawa
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2010 – 2019
- 2015
[j3]Shoichiro Kawashima, Keizo Morita, Mitsuharu Nakazawa, Kazuaki Yamane, Mitsuhiro Ogai, Kuninori Kawabata, Kazuaki Takai, Yasuhiro Fujii, Ryoji Yasuda, Wensheng Wang
, Yukinobu Hikosaka, Ken'ichi Inoue:
An 8-Mbit 0.18-µm CMOS 1T1C FeRAM in Planar Technology. IEICE Trans. Electron. 98-C(11): 1047-1057 (2015)
2000 – 2009
- 2007
- [j2]Shoichiro Kawashima, Isao Fukushi, Keizo Morita, Ken-ichi Nakabayashi, Mitsuharu Nakazawa, Kazuaki Yamane, Tomohisa Hirayama, Toru Endo:
A Reliable 1T1C FeRAM Using a Thermal History Tracking 2T2C Dual Reference Level Technique for a Smart Card Application Chip. IEICE Trans. Electron. 90-C(10): 1941-1948 (2007) - 2002
- [j1]Shoichiro Kawashima, Toru Endo, Akira Yamamoto, Ken-ichi Nakabayashi, Mitsuharu Nakazawa, Keizo Morita, Masaki Aoki:
Bitline GND sensing technique for low-voltage operation FeRAM. IEEE J. Solid State Circuits 37(5): 592-598 (2002)
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last updated on 2024-04-25 05:42 CEST by the dblp team
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