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Bruce Fishbein

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2012
[c1]
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  dblp key:
  - conf/isscc/MillerBKKMSKVYLHSKPHCYXMCSABVTLKFJ12
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  persistent URL:
  - https://dblp.org/rec/conf/isscc/MillerBKKMSKVYLHSKPHCYXMCSABVTLKFJ12
Brian Miller, Derek Brasili, Tim Kiszely, Rob Kuhn, Rahul Mehrotra, Manan Salvi, Mandar Kulkarni, Anand Varadharajan, Shi-Huang Yin, William Lin, Adam Hughes, Bill Stysiack, Vasu Kandadi, Ilan Pragaspathi, Dan Hartman, David Carlson, Vishnu Yalala, Thucydides Xanthopoulos, Scott E. Meninger, Ethan Crain, Mark Spaeth, Akin Aina, Suresh Balasubramanian, Joe Vulih, Pragati Tiwary, David Lin, Richard Kessler, Bruce Fishbein, Anil Jain:
A 32-core RISC microprocessor with network accelerators, power management and testability features. ISSCC 2012: 58-60

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