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ORCIDJuan J. Navarro
Person information
Other persons with a similar name
- Juan-Gabriel Cegarra-Navarro
![[0000-0003-3371-5670]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0003-3371-5670")
(aka: Juan G. Cegarra-Navarro) — Polytechnic University of Cartagena, Spain - Juan García (aka: Juan Francisco García Navarro) — University of Salamanca, Department of Computer Science, Spain
- Juan Enrique Garrido (aka: Juan Enrique Garrido Navarro)
- Juan-Manuel López-Navarro
- Juan A. Martínez 0001 (aka: Juan Antonio Martínez 0001, Juan Antonio Martínez Navarro, Juan A. Martinez 0001) — Odin Solutions S.L., Alcantarilla, Murcia, Spain (and 1 more)
- Juan José Moreno-Navarro — Technical University of Madrid, Spain
- Juan F. Navarro
- Juan L. Navarro-Mesa (aka: Juan Luis Navarro Mesa) — University of Las Palmas de Gran Canaria, Spain
- Juan Antonio Navarro Pérez
- Juan Carlos Valdiviezo-Navarro (aka: Juan Carlos Valdiviezo-N.)
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2000 – 2009
- 2009
[c38]Oscar Palomar, Toni Juan, Juan J. Navarro:
Reusing cached schedules in an out-of-order processor with in-order issue logic. ICCD 2009: 246-253- 2008
- [j9]José R. Herrero, Juan J. Navarro:
Hypermatrix oriented supernode amalgamation. J. Supercomput. 46(1): 84-104 (2008) - 2007
- [j8]José R. Herrero, Juan J. Navarro:
Analysis of a sparse hypermatrix Cholesky with fixed-sized blocking. Appl. Algebra Eng. Commun. Comput. 18(3): 279-295 (2007) - [j7]José R. Herrero, Juan J. Navarro:
Exploiting computer resources for fast nearest neighbor classification. Pattern Anal. Appl. 10(4): 265-275 (2007) - 2006
- [c37]José R. Herrero, Juan J. Navarro:
Compiler-Optimized Kernels: An Efficient Alternative to Hand-Coded Inner Kernels. ICCSA (5) 2006: 762-771 - [c36]José R. Herrero, Juan J. Navarro:
Sparse Hypermatrix Cholesky: Customization for High Performance. IMECS 2006: 821-827 - [c35]José R. Herrero, Juan J. Navarro:
Using Non-canonical Array Layouts in Dense Matrix Operations. PARA 2006: 580-588 - 2005
- [c34]José R. Herrero, Juan J. Navarro:
Efficient Implementation of Nearest Neighbor Classification. CORES 2005: 177-186 - [c33]José R. Herrero, Juan J. Navarro:
A Study on Load Imbalance in Parallel Hypermatrix Multiplication Using OpenMP. PPAM 2005: 124-131 - [c32]José R. Herrero, Juan J. Navarro:
Adapting Linear Algebra Codes to the Memory Hierarchy Using a Hypermatrix Scheme. PPAM 2005: 1058-1065 - 2004
- [c31]José R. Herrero, Juan J. Navarro:
Optimization of a Statically Partitioned Hypermatrix Sparse Cholesky Factorization. PARA 2004: 798-807 - 2003
- [c30]José R. Herrero, Juan J. Navarro:
Improving Performance of Hypermatrix Cholesky Factorization. Euro-Par 2003: 461-469 - [c29]Daniel Jiménez-González, Juan J. Navarro, Josep Lluís Larriba-Pey:
CC-Radix: a Cache Conscious Sorting Based on Radix sort. PDP 2003: 101-108 - [c28]José R. Herrero, Juan J. Navarro:
Automatic Benchmarking and Optimization of Codes: An Experience with Numerical Kernels. Software Engineering Research and Practice 2003: 701-706 - [c27]José R. Herrero, Juan J. Navarro:
Building Software Via Shared Knowledge. Software Engineering Research and Practice 2003: 861-870 - 2002
- [c26]Daniel Jiménez-González, Josep Lluís Larriba-Pey, Juan J. Navarro:
Case Study: Memory Conscious Parallel Sorting. Algorithms for Memory Hierarchies 2002: 355-377 - [c25]Daniel Jiménez-González, Juan J. Navarro, Josep Lluís Larriba-Pey:
The Effect of Local Sort on Parallel Sorting Algorithms. PDP 2002: 360-367 - 2001
- [c24]Daniel Jiménez-González, Juan J. Navarro, Josep Lluís Larriba-Pey:
Fast parallel in-memory 64-bit sorting. ICS 2001: 114-122
1990 – 1999
- 1999
- [c23]Daniel Jiménez-González, Josep Lluís Larriba-Pey, Juan J. Navarro:
Communication conscious radix sort. International Conference on Supercomputing 1999: 76-82 - [c22]Daniel Jiménez-González, E. Guinovart, Josep Lluís Larriba-Pey, Juan J. Navarro:
Sorting on the SGI Origin 2000: Comparing MPI and Shared Memory Implementations. SCCC 1999: 209-215 - 1998
- [c21]Toni Juan, Sanji Sanjeevan, Juan J. Navarro:
Dynamic History-length Fitting: A Third Level of Adaptivity for Branch Prediction. ISCA 1998: 155-166 - 1997
- [c20]Toni Juan, Juan J. Navarro, Olivier Temam:
Data Caches for Superscalar Processors. International Conference on Supercomputing 1997: 60-67 - [c19]Toni Juan, Tomás Lang, Juan J. Navarro:
Reducing TLB power requirements. ISLPED 1997: 196-201 - [c18]Josep Lluís Larriba-Pey, Daniel Jiménez-González, Juan J. Navarro:
An Analysis of Superscalar Sorting Algorithms on an R8000 Processor. SCCC 1997: 125-134 - 1996
- [j6]Josep Lluís Larriba-Pey, Juan J. Navarro, Angel Jorba, Oriol Roig:
Review of General and Toeplitz Vector Bidiagonal Solvers. Parallel Comput. 22(8): 1091-1126 (1996) - [c17]Juan J. Navarro, Elena García-Diego, José R. Herrero:
Data Prefetching and Multilevel Blocking for Linear Algebra Operations. International Conference on Supercomputing 1996: 109-116 - [c16]Juan J. Navarro, Elena García-Diego, Josep Lluís Larriba-Pey, Toni Juan:
Block Algorithms for Sparse Matrix Computations on High Performance Workstations. International Conference on Supercomputing 1996: 301-308 - [c15]Toni Juan, Tomás Lang, Juan J. Navarro:
The Difference-bit Cache. ISCA 1996: 114-120 - 1995
- [c14]Josep Lluís Larriba-Pey, Michael Mascagni, Angel Jorba, Juan J. Navarro:
An Analysis of the Parallel Computation of Arbitrarily Branched Cable Neuron Models. PP 1995: 373-378 - [c13]José M. Cela, Jesús Labarta, Andrés Pérez, Juan J. Navarro:
Performance on Distributed Memory Multicomputers of Domain Decomposition Solvers. PP 1995: 391-392 - [c12]Josep Lluís Larriba-Pey, Angel Jorba, Juan J. Navarro:
A Generalized Criterion for the Early Termination of R-Cyclic Reduction and Divide and Conquer for Recurrences. PP 1995: 448-453 - 1994
- [c11]Juan J. Navarro, Toni Juan, Tomás Lang:
MOB forms: a class of multilevel block algorithms for dense linear algebra operations. International Conference on Supercomputing 1994: 354-363 - [c10]Josep Lluís Larriba-Pey, Juan J. Navarro, Oriol Roig, Angel Jorba:
A generalized vision of some parallel bidiagonal systems solvers. International Conference on Supercomputing 1994: 404-411 - 1993
- [j5]Josep Lluís Larriba-Pey, Angel Jorba, Juan J. Navarro:
Spike Algorithm with savings for strictly diagonal dominant tridiagonal systems. Microprocess. Microprogramming 39(2-5): 125-128 (1993) - [c9]Josep Lluís Larriba-Pey, Angel Jorba, Juan J. Navarro:
A Parallel Tridiagonal Solver for Vector Uniprocessors. PPSC 1993: 590-597 - 1992
- [j4]Miguel Valero-García, Juan J. Navarro, José María Llabería, Mateo Valero, Tomás Lang:
A method for implementation of one-dimensional systolic algorithms with data contraflow using pipelined functional units. J. VLSI Signal Process. 4(1): 7-25 (1992) - [c8]Mateo Valero, Tomás Lang, José M. Llabería, Montse Peiron, Eduard Ayguadé, Juan J. Navarro:
Increasing the Number of Strides for Conflict-Free Vector Access. ISCA 1992: 372-381 - 1991
- [j3]Agustín Fernández, José María Llabería, Juan J. Navarro, Miguel Valero-García:
Performance evaluation of transputer systems with linear algebra problems. Microprocessing and Microprogramming 32(1-5): 825-832 (1991) - [j2]Mateo Valero, Tomás Lang, José María Llabería, Montse Peiron, Juan J. Navarro, Eduard Ayguadé:
Conflict-Free Strides for Vectors in Matched Memories. Parallel Process. Lett. 1: 95-102 (1991) - [c7]Agustín Fernández, José M. Llabería, Juan J. Navarro, Miguel Valero-García:
Transformation of systolic algorithms for interleaving partitions. ASAP 1991: 56-71 - [c6]Miguel Valero-García, Juan J. Navarro, José J. M. Liabería, Mateo Valero, Tomás Lang:
Mapping QR decomposition of a banded matrix on a ID systolic array with data contraflow and pipelined functional units. Algorithms and Parallel VLSI Architectures 1991: 25-38 - [c5]Agustín Fernández, José M. Llabería, Juan J. Navarro, Miguel Valero-García:
Interleaving Partitions of Systolic Algorithms for Programming Distributed Memory Multiprocessors. EDMCC 1991: 90-99 - 1990
- [c4]Miguel Valero-García, Juan J. Navarro, José M. Llabería, Mateo Valero:
Implementation of systolic algorithms using pipelined functional units. ASAP 1990: 272-283
1980 – 1989
- 1989
- [c3]Miguel Valero-García, Juan J. Navarro, José M. Llabería, Mateo Valero:
Systematic Hardware Adaptation of Systolic Algorithms. ISCA 1989: 96-104 - 1987
- [j1]Juan J. Navarro, José M. Llabería, Mateo Valero:
Partitioning: An Essential Step in Mapping Algorithms Into Systolic Array Processors. Computer 20(7): 77-89 (1987) - 1986
- [c2]Juan J. Navarro, José M. Llabería, Mateo Valero:
Solving Matrix Problems with No Size Restriction on a Systolic Array Processor. ICPP 1986: 676-683 - [c1]Juan J. Navarro, José M. Llabería, Mateo Valero:
Computing Size-Independent Matrix Problems on Systolic Array Processors. ISCA 1986: 271-278
Coauthor Index
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