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ORCIDLiji Wu
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2020 – today
- 2024
[j16]Byambajav Ragchaa
, Liji Wu, Xiangmin Zhang:
A Design of Fault-Tolerant Battery Monitoring IC for Electric Vehicles Complying With ISO 26262. IEEE Open J. Circuits Syst. 5: 166-177 (2024)- [j15]Le Wu, Liji Wu, Xiangmin Zhang, Munkhbaatar Chinbat:
Dual-Rail Precharge Logic-Based Side-Channel Countermeasure for DNN Systolic Array. IEEE Trans. Very Large Scale Integr. Syst. 32(9): 1740-1743 (2024) - [i2]Jinnuo Li, Chi Cheng, Muyan Shen, Peng Chen, Qian Guo, Dongsheng Liu, Liji Wu, Jian Weng:
Grafted Trees Bear Better Fruit: An Improved Multiple-Valued Plaintext-Checking Side-Channel Attack against Kyber. IACR Cryptol. ePrint Arch. 2024: 1174 (2024) - 2023
- [c51]PuSen Wu, Liji Wu, Hao Xue, Zhenhui Zhang, Byambajav Ragchaa, Xiangmin Zhang:
A High-precision Current Detection Circuit for Battery Management System. ASICON 2023: 1-4 - 2021
- [j14]Ye Yuan, Liji Wu, Xiangmin Zhang:
Gini-Impurity Index Analysis. IEEE Trans. Inf. Forensics Secur. 16: 3154-3169 (2021) - 2020
- [j13]Dongquan Huo, Luhong Mao, Liji Wu, Xiangmin Zhang:
An ultra-low-power 5GHz front end with feedforward body bias LNA and single to double balance subharmonic mixer topology for direct conversion receiver. IEICE Electron. Express 17(12): 20200163 (2020) - [c50]Taifeng Hu, Liji Wu, Xiangmin Zhang, Zhaopo Liao:
Hardware Trojan Detection Combines with Machine Learning: an Isolation Forest-based Detection Method. BigDataSE 2020: 96-103
2010 – 2019
- 2019
- [j12]Ye Yuan, Kaige Qu, Liji Wu, Jia-Wei Ma, Xiangmin Zhang:
Correlation power attack on a message authentication code based on SM3. Frontiers Inf. Technol. Electron. Eng. 20(7): 930-945 (2019) - [j11]Ye Yuan, Liji Wu, Yijun Yang, Xiangmin Zhang:
Erratum to "A Novel Multiple-Bits Collision Attack Based on Double Detection with Error-Tolerant Mechanism". Secur. Commun. Networks 2019: 5742308:1-5742308:2 (2019) - [c49]Junru An, Zhiwei Cui, Zhenhui Zhang, Liji Wu, Xiangmin Zhang:
Research on Temperature Characteristics of IoT Chip Hardware Trojan Based on FPGA. CSPS 2019: 1222-1230 - [c48]Feng Liang, Yanzhao Yin, Zhenhui Zhang, Liji Wu, Xiangmin Zhang:
Hardware Implementation Based on Contact IC Card Scalar Multiplication. CSPS 2019: 1344-1352 - 2018
- [j10]Ye Yuan, Liji Wu, Yijun Yang, Xiangmin Zhang:
A Novel Multiple-Bits Collision Attack Based on Double Detection with Error-Tolerant Mechanism. Secur. Commun. Networks 2018: 2483619:1-2483619:13 (2018) - [c47]Uyangaa Khuchit, Yonghong Bai, Liji Wu, Xiangmin Zhang:
An Improved Cross-Coupled NAND Gates PUF for Bank IC Card. ICCSP 2018: 150-153 - 2017
- [c46]Junhui Li, Liji Wu, Xiangmin Zhang:
An efficient HMAC processor based on the SHA-3 HASH function. ASICON 2017: 252-255 - [c45]Mengmeng Xu, Liji Wu, Xiangmin Zhang:
Side Channel Attack on SM4 Algorithm with Ensemble Method. CIS 2017: 529-532 - [c44]Dengrong Li, Liji Wu, Shuai Yuan, Xiangmin Zhang:
A 50Gb/s repeater and 2 × 50Gb/s 27-1 PRBS generator. ISCAS 2017: 1-4 - [c43]Shuai Yuan, Liji Wu, Ziqiang Wang, Chun Zhang, Zhihua Wang, Hanjun Jiang:
A 25Gb/s serial-link repeater with receiver equalization and transmitter de-emphasis in 0.13μm SiGe BiCMOS. MWSCAS 2017: 527-530 - 2016
- [j9]Qian Wang, An Wang, Liji Wu, Jiliang Zhang:
A new zero value attack combined fault sensitivity analysis on masked AES. Microprocess. Microsystems 45: 355-362 (2016) - [j8]Shuai Yuan, Liji Wu, Ziqiang Wang, Xuqiang Zheng, Chun Zhang, Zhihua Wang:
A 70 mW 25 Gb/s Quarter-Rate SerDes Transmitter and Receiver Chipset With 40 dB of Equalization in 65 nm CMOS Technology. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(7): 939-949 (2016) - [c42]Sulong Tang, Liji Wu, Xiangmin Zhang, Xingjun Wu, Beibei Wang:
A Novel Method of Correlation Power Analysis on SM4 Hardware Implementation. CIS 2016: 203-207 - [c41]Qingshuang Han, Liji Wu, Xiangmin Zhang:
Research on Side Channel Attack for USB Key. CIS 2016: 594-597 - [c40]Xue-Cheng Man, Liji Wu, Xiangmin Zhang, Tai-Kun Ma, Wen Jia:
A High Precision Multi-Cell Battery Voltage Detecting Circuit for Battery Management Systems. VTC Spring 2016: 1-5 - 2015
- [j7]An Wang, Zongyue Wang, Xuexin Zheng, Xiaomei Wang, Man Chen, Guoshuang Zhang, Liji Wu:
Efficient collision attacks on smart card implementations of masked AES. Sci. China Inf. Sci. 58(5): 1-15 (2015) - [j6]Xiaowei Han, Beibei Wang, Liji Wu, An Wang:
A high-performance elliptic curve cryptographic coprocessor with side channel analysis countermeasures for smart IC card. IEICE Electron. Express 12(20): 20150470 (2015) - [j5]Yanting Ren, Liji Wu, An Wang:
Double Sieve Collision Attack Based on Bitwise Detection. KSII Trans. Internet Inf. Syst. 9(1): 296-308 (2015) - [j4]Zhenbin Zhang, Liji Wu, An Wang, Zhaoli Mu, Xiangmin Zhang:
A novel bit scalable leakage model based on genetic algorithm. Secur. Commun. Networks 8(18): 3896-3905 (2015) - [c39]Xiaoyan Jia, Liji Wu, Beibei Wang, Xiangmin Zhang:
A novel oscillator-based TRNG for smart IC card. ASICON 2015: 1-4 - [c38]Yi Wang, Liji Wu, Zhi-Yuan Tu, Xiangmin Zhang, Wen Jia:
A 125KHz low frequency power recovery circuit for battery-less TPMS SoC. ASICON 2015: 1-4 - [c37]Yanting Ren, An Wang, Liji Wu:
Transient-Steady Effect Attack on Block Ciphers. CHES 2015: 433-450 - [c36]Shuai Yuan, Liji Wu, Ziqiang Wang, Xuqiang Zheng, Wen Jia, Chun Zhang, Zhihua Wang:
A 4×20-Gb/s 0.86pJ/b/lane 2-tap-FFE source-series-terminated transmitter with far-end crosstalk cancellation and divider-less clock generation in 65nm CMOS. CICC 2015: 1-4 - [c35]Kaige Qu, Liji Wu, Xiangmin Zhang:
A Novel Detection Algorithm for Ring Oscillator Network Based Hardware Trojan Detection with Tactful FPGA Implementation. CIS 2015: 299-302 - [c34]Shaohui Zhang, Liji Wu, Xiangmin Zhang, Xingjun Wu, Xiangyu Li, Huajun Fang:
A Template Attack-Resistant Masking Scheme for RC4 Based on FPGA. CIS 2015: 381-384 - [c33]Qian Lei, Liji Wu, Shaohui Zhang, Xiangmin Zhang, Xiangyu Li, Liyang Pan, Zhimeng Dong:
Software Hardware Co-design for Side-Channel Analysis Platform on Security Chips. CIS 2015: 398-401 - [c32]Shuai Yuan, Liji Wu, Ziqiang Wang, Xuqiang Zheng, Peng Wang, Wen Jia, Chun Zhang, Zhihua Wang:
A 48mW 15-to-28Gb/s source-synchronous receiver with adaptive DFE using hybrid alternate clock scheme and baud-rate CDR in 65nm CMOS. ESSCIRC 2015: 144-147 - [c31]Qian Wang, An Wang, Liji Wu, Gang Qu, Guoshuang Zhang:
Template attack on masking AES based on fault sensitivity analysis. HOST 2015: 96-99 - 2014
- [j3]Shuai Yuan, Ziqiang Wang, Xuqiang Zheng, Ke Huang, Ni Xu, Woogeun Rhee, Liji Wu, Chun Zhang:
A 4.8-mW/Gb/s 9.6-Gb/s 5 + 1-Lane Source-Synchronous Transmitter in 65-nm Bulk CMOS. IEEE Trans. Circuits Syst. II Express Briefs 61-II(4): 209-213 (2014) - [c30]Hao Liang, Liji Wu, Xiangmin Zhang, Jiabin Wang:
Design of a Masked S-Box for SM4 Based on Composite Field. CIS 2014: 387-391 - [c29]Wei Liu, Liji Wu, Xiangmin Zhang, An Wang:
Wavelet-Based Noise Reduction in Power Analysis Attack. CIS 2014: 405-409 - [c28]Xiaowei Han, Beibei Wang, An Wang, Liji Wu, Woogeun Rhee:
Algorithm-Based Countermeasures against Power Analysis Attacks for Public-Key Cryptography SM2. CIS 2014: 435-439 - [c27]Wenjing Hu, Liji Wu, An Wang, Xinjun Xie, Zhihui Zhu, Shun Luo:
Adaptive Chosen-Plaintext Correlation Power Analysis. CIS 2014: 494-498 - [c26]Ye Hu, Liji Wu, An Wang, Beibei Wang:
Hardware Design and Implementation of SM3 Hash Algorithm for Financial IC Card. CIS 2014: 514-518 - [c25]Fei Song, Liji Wu, An Wang, Xinyu Zhao:
A Novel Subspace Template Attack Based on Symmetric Cross Entropy Criterion. CIS 2014: 667-670 - [c24]Zhenbin Zhang, Liji Wu, Zhaoli Mu, Xiangmin Zhang:
A Novel Template Attack on wNAF Algorithm of ECC. CIS 2014: 671-675 - [c23]Li Wang, Rui Ma, Chen Zhang, Zongyu Dong, Fei Lu, Albert Z. Wang, Xin Wang, Jian Liu, Siqiang Fan, He Tang, Baoyong Chi, Liji Wu, Tianling Ren:
Scalable behavior modeling for SCR based ESD protection structures for circuit simulation. ISCAS 2014: 2333-2336 - [i1]Zhenbin Zhang, Liji Wu, An Wang, Zhaoli Mu:
Improved Leakage Model Based on Genetic Algorithm. IACR Cryptol. ePrint Arch. 2014: 314 (2014) - 2013
- [j2]Yun Niu, Liji Wu, Xiangmin Zhang:
An IPSec Accelerator Design for a 10Gbps In-Line Security Network Processor. J. Comput. 8(2): 319-325 (2013) - [j1]Yun Niu, Liji Wu, Yang Liu, Xiangmin Zhang, Hong Yi Chen:
A 10 Gbps in-line network security processor based on configurable hetero-multi-cores. J. Zhejiang Univ. Sci. C 14(8): 642-651 (2013) - [c22]Yangyang Guo, Liji Wu, Tengfei Zhai, Xiao Yu, Xiangmin Zhang:
Mixed-signal SoC design and low power research for tire pressure monitoring systems. ASICON 2013: 1-4 - [c21]Yang Li, Liji Wu, Xiangmin Zhang:
Design of 13.56MHz power recovery circuit with signal transmission for contactless bank IC card. ASICON 2013: 1-4 - [c20]Jiajia Shao, Liji Wu, Xiangmin Zhang:
Design and implementation of RSA for dual interface bank IC card. ASICON 2013: 1-4 - [c19]Ningyuan Yin, Liji Wu, Tengfei Zhai, Xiangmin Zhang, Rui Zhu:
A novel ESD device for Whole-Chip ESD protection network of TPMS mixed signal SoC. ASICON 2013: 1-4 - [c18]Shuai Yuan, Ziqiang Wang, Xuqiang Zheng, Ke Huang, Liji Wu, Zhihua Wang:
A 10-Gb/s simplified transceiver with a quarter-rate 4-tap decision feedback equalizer in 0.18-μm CMOS technology. ASICON 2013: 1-4 - [c17]Qian Wang, Liji Wu, Xiangmin Zhang, Xiangyu Li, Jun Guo:
Efficient Countermeasures against Fault Attacks for 3DES Crypto Engine in Bank IC Card. CIS 2013: 729-733 - [c16]Jie Bai, Liji Wu, Niu Yun, Yang Liu, Xiangmin Zhang:
A 10Gbps in-line Network Security Processor with a 32-bit embedded CPU. WOCC 2013: 616-619 - [c15]Yanting Ren, Liji Wu:
Power analysis attacks on wireless sensor nodes using CPU smart card. WOCC 2013: 665-670 - [c14]Jiang-pei Xu, Liji Wu, Xiang-jun Yang, Yu-zhong Wang, Xiangmin Zhang:
A security vulnerability of Java Card on array access in financial system. WOCC 2013: 707-710 - 2012
- [c13]Yang Liu, Liji Wu, Yun Niu, Xiangmin Zhang, Zhiqiang Gao:
A High-Speed SHA-1 IP Core for 10 Gbps Ethernet Security Processor. CIS 2012: 237-241 - [c12]Mengmeng Ling, Liji Wu, Xiangyu Li, Xiangmin Zhang, Jinsong Hou, Yong Wang:
Design of Monitor and Protect Circuits against FIB Attack on Chip Security. CIS 2012: 530-533 - [c11]Jun Guo, Liji Wu, Xiangming Zhang, Xiangyu Li:
Design and Implementation of a Fault Attack Platform for Smart IC Card. CIS 2012: 653-656 - [c10]Liji Wu, Xiangmin Zhang, Xiao Yu, Xuyang Ding, Chaojun Chi:
A Battery-less Tire Pressure Monitoring System. ICCVE 2012: 222-225 - 2011
- [c9]Jinyu Zhu, Liji Wu, Xiangmin Zhang, Chen Jia, Chun Zhang:
A low-power 433MHz transmitter for battery-less Tire Pressure Monitoring System. ASICON 2011: 184-187 - [c8]Zerong Tao, Liji Wu, Xiangmin Zhang:
Reflection analysis of signal transmission in 32-bit CPU based SiP. ASICON 2011: 743-746 - [c7]Chunlin Xie, Liji Wu, Xiangmin Zhang:
Research on testing of 32-bit CPU based SiP. ASICON 2011: 747-750 - [c6]Bo Li, Liji Wu, Xiangmin Zhang:
New power rail ESD clamp design with current starving technology. ASICON 2011: 961-964 - [c5]Junwei He, Liji Wu, Xiangmin Zhang:
Design and implementation of a low Power Java Coprocessor for dual-interface IC Bank Card. ASICON 2011: 965-969 - [c4]Jianqin Qian, Chun Zhang, Liji Wu, Xijin Zhao, Dingguo Wei, Zhihao Jiang, Yuhui He:
A passive UHF tag for RFID-based train axle temperature measurement system. CICC 2011: 1-4 - [c3]Kun Gu, Liji Wu, Xiangyu Li, Xiangxin Zhang:
Design and Implementation of an Electromagnetic Analysis System for Smart Cards. CIS 2011: 653-656 - [c2]Yun Niu, Liji Wu, Li Wang, Xiangmin Zhang, Jun Xu:
A Configurable IPSec Processor for High Performance In-Line Security Network Processor. CIS 2011: 674-678 - [c1]Wenli Yang, Liji Wu, Chen Jia, Xiangmin Zhang:
A Low Power LDO Design for Battery-Less TPMS. ICFCE 2011: 907-913
Coauthor Index
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