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2020 – today
- 2024
[c18]Joonseop Sim, Soohong Ahn, Taeyoung Ahn, Seungyong Lee, Myunghyun Rhee, Jooyoung Kim, Kwangsik Shin, Donguk Moon, Euiseok Kim, Kyoung Park:
Computational CXL-Memory Solution for Accelerating Memory-Intensive Applications. HPCA 2024: 615- 2023
- [j9]Joonseop Sim
, Soohong Ahn, Taeyoung Ahn, Seungyong Lee, Myunghyun Rhee, Jooyoung Kim, Kwangsik Shin, Donguk Moon, Euiseok Kim, Kyoung Park:
Computational CXL-Memory Solution for Accelerating Memory-Intensive Applications. IEEE Comput. Archit. Lett. 22(1): 5-8 (2023) - [j8]Euiseok Kim, Taehyeong Son, Soonhoi Ha:
A novel hierarchical edge-based architecture for service oriented IoT. Internet Things 24: 100939 (2023) - 2022
- [c17]Sangsu Park, Gyonhui Lee, Youngjae Kwon, Dong Ik Suh, Hanwool Lee, Sangeun Je, Dabin Kim, Dohan Lee, Seungwook Ryu, Seungbum Kim, Euiseok Kim, Sunghoon Lee, Kyoung Park, Seho Lee, Myung-Hee Na, Seonyong Cha:
Recognition Accuracy Enhancement using Interface Control with Weight Variation-Lowering in Analog Computation-in-Memory. IMW 2022: 1-3
2010 – 2019
- 2018
- [c16]Barend Harris, Mansureh S. Moghaddam, Duseok Kang, Inpyo Bae, Euiseok Kim, Hyemi Min, Hansu Cho, Sukjin Kim, Bernhard Egger, Soonhoi Ha, Kiyoung Choi:
Architectures and algorithms for user customization of CNNs. ASP-DAC 2018: 540-547 - [c15]Duseok Kang, Euiseok Kim, Inpyo Bae, Bernhard Egger, Soonhoi Ha:
C-GOOD: C-code generation framework for optimized on-device deep learning. ICCAD 2018: 105 - 2017
- [c14]Mansureh S. Moghaddam, Barend Harris, Duseok Kang, Inpyo Bae, Euiseok Kim, Hyemi Min, Hansu Cho, Sukjin Kim, Bernhard Egger, Soonhoi Ha, Kiyoung Choi:
Incremental training of CNNs for user customization: work-in-progress. CASES 2017: 9:1-9:2 - 2016
- [j7]Euiseok Kim, Youngsub Ko, Soonhoi Ha:
An Adaptive Frames Per Second-Based CPU-GPU Cooperative Dynamic Voltage and Frequency Scaling Governing Technique for Mobile Games. J. Low Power Electron. 12(4): 309-322 (2016) - 2015
- [j6]Yongrae Cho, Euiseok Kim, Wonjoon Kim:
Strategy transformation under technological convergence: evidence from the printed electronics industry. Int. J. Technol. Manag. 67(2/3/4): 106-131 (2015) - 2014
- [j5]Euiseok Kim, Yongrae Cho, Wonjoon Kim:
Dynamic patterns of technological convergence in printed electronics technologies: patent citation network. Scientometrics 98(2): 975-998 (2014) - [j4]Euiseok Kim, Hyunmi Jeong, Jinwoo Yang, Minseok Song:
Balancing energy use against video quality in mobile devices. IEEE Trans. Consumer Electron. 60(3): 517-524 (2014) - [j3]Minseok Song, Yeongju Lee, Euiseok Kim:
Saving disk energy in video servers by combining caching and prefetching. ACM Trans. Multim. Comput. Commun. Appl. 10(1s): 15:1-15:21 (2014) - 2013
- [c13]Minseok Song, Yeongju Lee, Euiseok Kim:
Data prefetching to reduce energy use by heterogeneous disk arrays in video servers. NOSSDAV 2013: 1-6 - 2012
- [c12]Se-Hyun Yang, Seogjun Lee, Jae Young Lee, Jeonglae Cho, Hoi-Jin Lee, Dongsik Cho, Junghun Heo, Sunghoon Cho, Youngmin Shin, Sunghee Yun, Euiseok Kim, Ukrae Cho, Edward Pyo, Man Hyuk Park, Jae-Cheol Son, Chinhyun Kim, Jeongnam Youn, Youngki Chung, Sungho Park, Seung Ho Hwang:
A 32nm high-k metal gate application processor with GHz multi-core CPU. ISSCC 2012: 214-216
2000 – 2009
- 2005
- [j2]Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee:
Instruction level redundant number computations for fast data intensive processing in asynchronous processors. J. Syst. Archit. 51(3): 151-164 (2005) - 2004
- [c11]Jeong-Gun Lee, Euiseok Kim, Jeong-A Lee, Eunok Paek:
Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization. Asia-Pacific Computer Systems Architecture Conference 2004: 582-595 - 2003
- [j1]Nattha Sretasereekul, Hiroshi Saito, Euiseok Kim, Metehan Özcan, Masashi Imai, Hiroshi Nakamura, Takashi Nanya:
Synthesis of Serial Local Clock Controllers for Asynchronous Circuit Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(12): 3028-3037 (2003) - [c10]Euiseok Kim, Dong-Ik Lee, Hiroshi Saito, Hiroshi Nakamura, Jeong-Gun Lee, Takashi Nanya:
Performance optimization of synchronous control units for datapaths with variable delay arithmetic units. ASP-DAC 2003: 816-819 - [c9]Hiroshi Saito, Euiseok Kim, Nattha Sretasereekul, Masashi Imai, Hiroshi Nakamura, Takashi Nanya:
Control Signal Sharing Using Data-Path Delay Information at Control Data Flow Graph Descriptions. ASYNC 2003: 184-195 - [c8]Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya:
Distributed Synchronous Control Units for Dataflow Graphs under Allocation of Telescopic Arithmetic Units. DATE 2003: 10276-10281 - [c7]Nattha Sretasereekul, Hiroshi Saito, Masashi Imai, Euiseok Kim, Metehan Özcan, K. Thongnoo, Hiroshi Nakamura, Takashi Nanya:
A zero-time-overhead asynchronous four-phase controller. ISCAS (5) 2003: 205-208 - [c6]Hiroshi Saito, Euiseok Kim, Masashi Imai, Nattha Sretasereekul, Hiroshi Nakamura, Takashi Nanya:
Control signal sharing of asynchronous circuits using datapath delay information. ISCAS (5) 2003: 617-620 - 2001
- [c5]Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee:
Building a Distributed Asynchronous Control Unit through Automatic Derivation of Hierarchically Decomposed AFSMs from a CDFG. ARVLSI 2001: 2-15 - [c4]Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee:
Imprecise data computation for high performance asynchronous processors. ASP-DAC 2001: 261-266 - [c3]Euiseok Kim, Dong-Ik Lee:
A new resource constrained asynchronous scheduling method through transformation of dataflow graphs. ISCAS (5) 2001: 41-44 - 2000
- [c2]Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee:
Automatic Process-Oriented Control Circuit Generation for Asynchronous High-Level Synthesis. ASYNC 2000: 104-113 - [c1]Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee:
Automatic distributed asynchronous control circuit generation from data flow graph for asynchronous high-level synthesis. ISCAS 2000: 49-52
Coauthor Index
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