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2020 – today
- 2021
[j31]Kiyotaka Yamamura:
An efficient algorithm for finding all solutions of nonlinear equations using parallelogram LP test. J. Comput. Appl. Math. 382: 113080 (2021)- 2020
- [j30]Kiyotaka Yamamura:
Finding all solution sets of piecewise-linear interval equations using an integer programming solver. J. Comput. Appl. Math. 372: 112616 (2020)
2010 – 2019
- 2018
- [c22]Kiyotaka Yamamura, Takumi Shimada:
An Efficient Variable-Gain Homotopy Method for Finding DC Operating Points of Transistor Circuits. APCCAS 2018: 235-238 - [c21]Kiyotaka Yamamura, Hiroki Takahara:
Finding All Solutions of Piecewise-Linear Resistive Circuits Using Triangular LP Test. APCCAS 2018: 243-246 - 2017
- [c20]Kiyotaka Yamamura, Hiroki Takahara:
Complete analysis of fiecewise-linear resistive circuits using integer programming. ECCTD 2017: 1-4 - [c19]Kiyotaka Yamamura, Ryota Watanabe:
Finding all solution sets of piecewise-linear interval equations using integer programming. ECCTD 2017: 1-4 - 2016
- [j29]Kiyotaka Yamamura, Suguru Ishiguro, Hiroshi Taki:
Characteristic Analysis and Tolerance Analysis of Nonlinear Resistive Circuits Using Integer Programming. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(3): 710-719 (2016) - [c18]Kiyotaka Yamamura, Ryota Watanabe:
A simple method for finding all characteristic curves of piecewise-linear resistive circuits using an integer programming solver. APCCAS 2016: 224-227 - [c17]Kiyotaka Yamamura, Daiki Koyama:
Finding all solutions of piecewise-linear resistive circuits using excel. APCCAS 2016: 228-231 - [c16]Kiyotaka Yamamura, Kiyoshi Adachi:
A modified predictor-corrector method for tracing solution curves. APCCAS 2016: 372-375 - 2015
- [c15]Kiyotaka Yamamura, Suguru Ishiguro:
Finding all DC solutions of nonlinear circuits using parallelogram LP test. ECCTD 2015: 1-4 - 2014
- [j28]Kiyotaka Yamamura, Hideki Tanaka:
Finding All Solutions of Piecewise-Linear Resistive Circuits Using Separable Programming. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(5): 1037-1041 (2014) - [j27]Kiyotaka Yamamura, Takuya Miyamoto:
DC Operating Point Analysis of Transistor Circuits Using the Variable-Gain Homotopy Method. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(5): 1042-1050 (2014) - [c14]Kiyotaka Yamamura, Hiroshi Taki:
Characteristic analysis and tolerance analysis of nonlinear resistive circuits using integer programming. APCCAS 2014: 755-758 - 2013
- [j26]Kiyotaka Yamamura, Mitsuru Tonokura:
Formulating hybrid equations and state equations for nonlinear circuits using SPICE. Int. J. Circuit Theory Appl. 41(1): 101-110 (2013) - [c13]Kiyotaka Yamamura, Hideki Tanaka:
Finding all solutions of piecewise-linear resistive circuits using separable programming. ECCTD 2013: 1-4 - 2012
- [j25]Kiyotaka Yamamura, Naoya Tamura:
Finding all solutions of separable systems of piecewise-linear equations using integer programming. J. Comput. Appl. Math. 236(11): 2844-2852 (2012) - 2011
- [c12]Kiyotaka Yamamura, Takahiro Ueda:
Finding all solutions of piecewise-linear resistive circuits using integer programming. ECCTD 2011: 628-631
2000 – 2009
- 2009
- [j24]Kiyotaka Yamamura, Koki Suda, Naoya Tamura:
LP narrowing: A new strategy for finding all solutions of nonlinear equations. Appl. Math. Comput. 215(1): 405-413 (2009) - [j23]Kiyotaka Yamamura, Koki Suda:
An Efficient and Practical Algorithm for Finding All DC Solutions of Nonlinear Circuits Using GLPK. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(2): 638-642 (2009) - [c11]Kiyotaka Yamamura, Naoya Tamura, Koki Suda:
An Efficient Algorithm for Finding all DC Solutions of Nonlinear Circuits using LP Narrowing. ISCAS 2009: 2081-2084 - 2008
- [j22]Kiyotaka Yamamura, Akinori Machida:
An efficient algorithm for finding all DC solutions of piecewise-linear circuits. Int. J. Circuit Theory Appl. 36(8): 989-1000 (2008) - [j21]Kiyotaka Yamamura, Yasuaki Haga:
Dc Tolerance Analysis of nonlinear Circuits Using Set-Valued Functions. J. Circuits Syst. Comput. 17(5): 785-796 (2008) - 2007
- [j20]Wataru Kuroki, Kiyotaka Yamamura:
A SPICE-Oriented Nonexistence Test for DC Solutions of Nonlinear Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(8): 1661-1668 (2007) - [j19]Wataru Kuroki, Kiyotaka Yamamura, Shingo Furuki:
An Efficient Variable Gain Homotopy Method Using the SPICE-Oriented Approach. IEEE Trans. Circuits Syst. II Express Briefs 54-II(7): 621-625 (2007) - 2006
- [j18]Wataru Kuroki, Kiyotaka Yamamura:
A SPICE-Oriented Method for Finding DC Operating Points of Nonlinear Circuits Containing Piecewise-Linear Macromodels. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(11): 3306-3312 (2006) - [j17]Wataru Kuroki, Kiyotaka Yamamura:
An Efficient Homotopy Method That Can Be Easily Implemented on SPICE. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(11): 3320-3326 (2006) - [j16]Kiyotaka Yamamura, Akinori Machida:
Finding All Solutions of Piecewise-Linear Resistive Circuits with High Approximation Accuracy. J. Circuits Syst. Comput. 15(3): 389-398 (2006) - [c10]Kiyotaka Yamamura, Wataru Kuroki:
An efficient and globally convergent homotopy method for finding DC operating points of nonlinear circuits. ASP-DAC 2006: 408-415 - [c9]Kiyotaka Yamamura, Wataru Kuroki:
An efficient homotopy method that can be easily implemented on SPICE. ISCAS 2006 - 2005
- [j15]Kiyotaka Yamamura, Wataru Kuroki, Hideaki Okuma, Yasuaki Inoue:
Path Following Circuits - SPICE-Oriented Numerical Methods Where Formulas are Described by Circuits - . IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(4): 825-831 (2005) - [j14]Kiyotaka Yamamura, Daiki Kaya:
Finding All DC Operating Points of Piecewise-Linear Circuits Containing Neither Voltage nor Current Controlled Resistors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(6): 1631-1634 (2005) - [j13]Yasuaki Inoue, Yu Imai, Kiyotaka Yamamura:
A Homotopy Method Using a Nonlinear Auxiliary Function for Solving Transistor Circuits. IEICE Trans. Inf. Syst. 88-D(7): 1401-1408 (2005) - [j12]Yu Imai, Kiyotaka Yamamura, Yasuaki Inoue:
An Efficient Homotopy Method for Finding DC Operating Points of Nonlinear Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(10): 2554-2561 (2005) - [c8]Kiyotaka Yamamura, Wataru Kuroki, Yasuaki Inoue:
Path following circuits - SPICE-oriented numerical methods where formulas are described by circuits $. ISCAS (4) 2005: 3761-3764 - [c7]Yu Imai, Kiyotaka Yamamura, Yasuaki Inoue:
An efficient homotopy method for finding DC operating points of nonlinear circuits. ISCAS (5) 2005: 4911-4914 - 2004
- [j11]Kiyotaka Yamamura, Naoya Igarashi:
An interval algorithm for finding all solutions of non-linear resistive circuits. Int. J. Circuit Theory Appl. 32(1): 47-55 (2004) - 2003
- [j10]Kiyotaka Yamamura, Osamu Nakamura:
Finding All Solutions of Transistor Circuits Using the Dual Simplex Method. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(2): 434-443 (2003) - [j9]Kiyotaka Yamamura:
Finding All Solution Sets of Piecewise-Trapezoidal Equations Described by Set-Valued Functions. Reliab. Comput. 9(3): 241-250 (2003) - [c6]Kiyotaka Yamamura, Naoya Igarashi, Yasuaki Inoue:
An interval algorithm for finding all solutions of nonlinear resistive circuits. ISCAS (3) 2003: 192-195 - [c5]Yasuaki Inoue, Saeko Kusanobu, Kiyotaka Yamamura, M. Ando:
An effective initial solution algorithm for globally convergent homotopy methods. ISCAS (3) 2003: 196-199 - [c4]Kiyotaka Yamamura, Takehisa Kitakawa:
Finding all solutions of piecewise-linear resistive circuits using the simplex method. ISCAS (3) 2003: 642-645 - 2002
- [j8]Yasuaki Inoue, Saeko Kusanobu, Kiyotaka Yamamura:
A Practical Approach for the Fixed-Point Homotopy Method Using a Solution-Tracing Circuit. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(1): 222-233 (2002) - [j7]Kiyotaka Yamamura, Masaki Sato, Osamu Nakamura, Takayoshi Kumakura:
An Efficient Algorithm for Finding All DC Solutions of Piecewise-Linear Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(11): 2459-2467 (2002) - [j6]Kiyotaka Yamamura, Shigeru Tanaka:
Finding all solutions of piecewise-linear resistive circuits using the dual simplex method. Int. J. Circuit Theory Appl. 30(6): 567-586 (2002) - [c3]Kiyotaka Yamamura, Hiroaki Hyodo:
Tolerance analysis of nonlinear circuits using set-valued functions. ISCAS (1) 2002: 649-652 - 2001
- [j5]Kiyotaka Yamamura, Shigeru Tanaka:
Improvement of the contraction‐type LP test algorithm for finding all solutions of piecewise‐linear resistive circuits. Int. J. Circuit Theory Appl. 29(4): 403-411 (2001) - [c2]Kiyotaka Yamamura, Takayoshi Kumakura:
Finding all characteristic curves of nonlinear resistive circuits using the dual simplex method. ISCAS (3) 2001: 25-28 - 2000
- [j4]Kiyotaka Yamamura, Shigeru Tanaka:
Performance evaluation of the LP test algorithm for finding all solutions of piecewise‐linear resistive circuits. Int. J. Circuit Theory Appl. 28(5): 501-506 (2000) - [j3]Kiyotaka Yamamura:
Finding All Solutions of Nonlinear Equations Using Linear Combinations of Functions. Reliab. Comput. 6(2): 105-113 (2000) - [c1]Kiyotaka Yamamura, Shigeru Tanaka:
Finding all solutions of piecewise-linear resistive circuits using the dual simplex method. ISCAS 2000: 165-168
1990 – 1999
- 1996
- [j2]Kiyotaka Yamamura, Masakazu Mishina:
An algorithm for finding all solutions of piecewise-linear resistive circuits. Int. J. Circuit Theory Appl. 24(2): 223-231 (1996) - 1990
- [j1]Kiyotaka Yamamura, Kazuo Horiuchi:
A globally and quadratically convergent algorithm for solving nonlinear resistive networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(5): 487-499 (1990)
Coauthor Index
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