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2020 – today
- 2021
[c5]Jie-Wei Lai:
Opportunity and Challenge of Chiplet-Based HPC and AIoT. VLSI-DAT 2021: 1-2
2010 – 2019
- 2013
- [c4]Jie-Wei Lai, Chi-Hsueh Wang, Kaipon Kao, Anson Lin, Yi-Hsien Cho, Lan-chou Cho, Meng-Hsiung Hung, Xin-Yu Shih
, Che-Min Lin, Sheng-Hong Yan, Yuan-Hung Chung, Paul C. P. Liang, Guang-Kaai Dehng, Hung-Sung Li, George Chien, Robert Bogdan Staszewski:
A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS. ISSCC 2013: 342-343 - 2012
- [c3]Yuan-Hung Chung, Min Chen, Wei-Kai Hong, Jie-Wei Lai, Sheng-Jau Wong, Chien-Wei Kuan, Hong-Lin Chu, Chihun Lee, Chih-Fan Liao, Hsuan-Yu Liu, Hong-Kai Hsu, Li-Chun Ko, Kuo-Hao Chen, Chao-Hsin Lu, Tsung-Ming Chen, YuLi Hsueh, Chunwei Chang, Yi-Hsien Cho, Chih-Hsien Shen, Yuan Sun, Eng-Chuan Low, Xudong Jiang, Deyong Hu, Weimin Shu, Jhy-Rong Chen, Jui-Lin Hsu, Chia-Jui Hsu, Jing-Hong Conan Zhan, Osama Shana'a, Guang-Kaai Dehng, George Chien:
A 4-in-1 (WiFi/BT/FM/GPS) connectivity SoC with enhanced co-existence performance in 65nm CMOS. ISSCC 2012: 172-174 - 2011
- [j3]Alberto Valdes-Garcia, Scott K. Reynolds, Arun Natarajan, Dong Gun Kam, Duixian Liu, Jie-Wei Lai, Yen-Lin Oscar Huang, Ping-Yu Chen, Ming-Da Tsai, Jing-Hong Conan Zhan, Sean Nicolson, Brian A. Floyd:
Single-element and phased-array transceiver chipsets for 60-ghz Gb/s communications. IEEE Commun. Mag. 49(4): 120-131 (2011) - 2010
- [j2]Alberto Valdes-Garcia, Sean T. Nicolson, Jie-Wei Lai, Arun Natarajan, Ping-Yu Chen, Scott K. Reynolds, Jing-Hong Conan Zhan, Dong Gun Kam, Duixian Liu, Brian A. Floyd:
A Fully Integrated 16-Element Phased-Array Transmitter in SiGe BiCMOS for 60-GHz Communications. IEEE J. Solid State Circuits 45(12): 2757-2773 (2010) - [c2]Alberto Valdes-Garcia, Sean Nicolson, Jie-Wei Lai, Arun Natarajan, Ping-Yu Chen, Scott K. Reynolds, Jing-Hong Conan Zhan, Brian A. Floyd:
A SiGe BiCMOS 16-element phased-array transmitter for 60GHz communications. ISSCC 2010: 218-219 - [c1]Jie-Wei Lai, Alberto Valdes-Garcia:
A 1V 17.9dBm 60GHz power amplifier in standard 65nm CMOS. ISSCC 2010: 424-425
2000 – 2009
- 2009
- [j1]Jie-Wei Lai, Chia-Hsin Wu, Anson Lin, Wei-Kai Hong, Cheng-Yu Wang, Chih-Hsien Shen, Yu-Hsin Lin, Yi-Hsien Cho, YangChuan Chen, Yuan-Hung Chung:
A World-Band Triple-Mode 802.11a/b/g SOC in 130-nm CMOS. IEEE J. Solid State Circuits 44(11): 2911-2921 (2009) - 2005
- [b1]Jie-Wei Lai:
Large Signal HBT Model and Integrated Circuit Design Using 300-Ghz Indium Phosphide HBT Technology. University of Illinois Urbana-Champaign, USA, 2005
Coauthor Index
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