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ORCIDTerry I. Chappell
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2000 – 2009
- 2001
[j4]Glenn Hinton, Michael Upton, David J. Sager, Darrell Boggs, Douglas M. Carmean, Patrice Roussel, Terry I. Chappell, Thomas D. Fletcher, Mark S. Milshtein, Milo Sprague, Samie Samaan, Robert Murray:
A 0.18-μm CMOS IA-32 processor with a 4-GHz integer execution unit. IEEE J. Solid State Circuits 36(11): 1617-1627 (2001)
1990 – 1999
- 1995
- [j3]Ghavam G. Shahidi, James D. Warnock, James Comfort, Stephen E. Fischer, Patricia A. McFarland, Alexandre Acovic, Terry I. Chappell, Barbara A. Chappell, Tak H. Ning, Carl J. Anderson, Robert H. Dennard, Jack Y.-C. Sun, Michael R. Polcari, Bijan Davari:
CMOS scaling in the 0.1-µm, 1.X-volt regime for high-performance applications. IBM J. Res. Dev. 39(1-2): 229-244 (1995)
1980 – 1989
- 1989
- [j2]Terry I. Chappell, Stanley E. Schuster, Barbara A. Chappell, James W. Allan, Jack Y.-C. Sun, Stephen P. Klepner, Robert L. Franch, Paul F. Greier, Phillip J. Restle:
A 3.5 ns/77 K and 6.2 ns/300 K 64 K CMOS RAM with ECL interfaces. IEEE J. Solid State Circuits 24(4): 859-868 (1989) - 1988
- [j1]Barbara A. Chappell, Terry I. Chappell, Stanley E. Schuster, Hermann M. Segmuller, James W. Allan, Robert L. Franch, Phillip J. Restle:
Fast CMOS ECL receivers with 100-mV worst-case sensitivity. IEEE J. Solid State Circuits 23(1): 59-67 (1988)
Coauthor Index
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