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2020 – today
- 2024
[j11]Mujtaba Hassan
, Arish Sateesan, Jo Vliegen, Stjepan Picek, Nele Mentens:
A Genetic Programming approach for hardware-oriented hash functions for network security applications. Appl. Soft Comput. 165: 112078 (2024)- [j10]Arish Sateesan, Jo Vliegen, Simon Scherrer, Hsu-Chun Hsiao, Adrian Perrig, Nele Mentens:
SPArch: A Hardware-oriented Sketch-based Architecture for High-speed Network Flow Measurements. ACM Trans. Priv. Secur. 27(4): 29:1-29:34 (2024) - [c30]An Braeken, Bruno da Silva, Laurent Segers, Johannes Knödtel, Marc Reichenbach, Cornelia Wulf, Sergio A. Pertuz, Diana Göhringer, Jo Vliegen, Md Masoom Rabbani, Nele Mentens:
Trusted Computing Architectures for IoT Devices. ARC 2024: 241-254 - [c29]Jo Vliegen, Md Masoom Rabbani, Wouter Hellemans, Nele Mentens:
HAGAR: Hashgraph-based Aggregated Communication and Remote Attestation. CF (Companion) 2024 - [c28]Mujtaba Hassan, Jo Vliegen, Stjepan Picek, Nele Mentens:
A Systematic Exploration of Evolutionary Computation for the Design of Hardware-oriented Non-cryptographic Hash Functions. GECCO 2024 - 2023
- [j9]Edlira Dushku, Md Masoom Rabbani, Jo Vliegen, An Braeken, Nele Mentens:
PROVE: Provable remote attestation for public verifiability. J. Inf. Secur. Appl. 75: 103448 (2023) - [j8]Arish Sateesan, Jelle Biesmans, Thomas Claesen, Jo Vliegen, Nele Mentens:
Optimized algorithms and architectures for fast non-cryptographic hash functions in hardware. Microprocess. Microsystems 98: 104782 (2023) - [c27]Mujtaba Hassan, Arish Sateesan, Jo Vliegen, Stjepan Picek, Nele Mentens:
Evolving Non-cryptographic Hash Functions Using Genetic Programming for High-speed Lookups in Network Security Applications. EvoApplications@EvoStar 2023: 302-318 - [c26]Simon Scherrer, Jo Vliegen, Arish Sateesan, Hsu-Chun Hsiao, Nele Mentens, Adrian Perrig:
ALBUS: a Probabilistic Monitoring Algorithm to Counter Burst-Flood Attacks. SRDS 2023: 162-172 - [i6]Simon Scherrer, Jo Vliegen, Arish Sateesan, Hsu-Chun Hsiao, Nele Mentens, Adrian Perrig:
ALBUS: a Probabilistic Monitoring Algorithm to Counter Burst-Flood Attacks. CoRR abs/2306.14328 (2023) - 2022
- [j7]Arish Sateesan, Jo Vliegen, Joan Daemen, Nele Mentens:
Hardware-oriented optimization of Bloom filter algorithms and architectures for ultra-high-speed lookups in network applications. Microprocess. Microsystems 93: 104619 (2022) - [c25]Arthur Beckers, Roel Uytterhoeven, Thomas Vandenabeele, Jo Vliegen, Lennert Wouters, Joan Daemen, Wim Dehaene, Benedikt Gierlichs, Nele Mentens:
Energy and side-channel security evaluation of near-threshold cryptographic circuits in 28nm FD-SOI technology. CF 2022: 258-262 - [c24]Wouter Hellemans, Md Masoom Rabbani, Jo Vliegen, Nele Mentens:
FOCUS: Frequency Based Detection of Covert Ultrasonic Signals. SEC 2022: 70-86 - [c23]Arish Sateesan, Jo Vliegen, Nele Mentens:
An Analysis of the Hardware-Friendliness of AMQ Data Structures for Network Security. SPACE 2022: 287-313 - 2021
- [c22]Thomas Claesen, Arish Sateesan, Jo Vliegen, Nele Mentens:
Novel Non-cryptographic Hash Functions for Networking and Security Applications on FPGA. DSD 2021: 347-354 - [c21]Shaza Zeitouni, Jo Vliegen, Tommaso Frassetto, Dirk Koch, Ahmad-Reza Sadeghi, Nele Mentens:
Trusted Configuration in Cloud FPGAs. FCCM 2021: 233-241 - [c20]Arish Sateesan, Jo Vliegen, Simon Scherrer, Hsu-Chun Hsiao, Adrian Perrig, Nele Mentens:
Speed Records in Network Flow Measurement on FPGA. FPL 2021: 219-224 - [c19]Md Masoom Rabbani, Edlira Dushku, Jo Vliegen, An Braeken, Nicola Dragoni, Nele Mentens:
RESERVE: Remote Attestation of Intermittent IoT devices. SenSys 2021: 578-580 - [c18]Laurens Le Jeune, Arish Sateesan, Md Masoom Rabbani, Toon Goedemé, Jo Vliegen, Nele Mentens:
SoK - Network Intrusion Detection on FPGA. SPACE 2021: 242-261 - [c17]Simon Scherrer, Che-Yu Wu, Yu-Hsi Chiang, Benjamin Rothenberger, Daniele Enrico Asoni, Arish Sateesan, Jo Vliegen, Nele Mentens, Hsu-Chun Hsiao, Adrian Perrig:
Low-Rate Overuse Flow Tracer (LOFT): An Efficient and Scalable Algorithm for Detecting Overuse Flows. SRDS 2021: 265-276 - [i5]Simon Scherrer, Che-Yu Wu, Yu-Hsi Chiang, Benjamin Rothenberger, Daniele Enrico Asoni, Arish Sateesan, Jo Vliegen, Nele Mentens, Hsu-Chun Hsiao, Adrian Perrig:
Low-Rate Overuse Flow Tracer (LOFT): An Efficient and Scalable Algorithm for Detecting Overuse Flows. CoRR abs/2102.01397 (2021) - 2020
- [c16]Arish Sateesan, Jo Vliegen, Joan Daemen, Nele Mentens:
Novel Bloom filter algorithms and architectures for ultra-high-speed network security applications. DSD 2020: 262-269 - [c15]Md Masoom Rabbani, Jo Vliegen, Mauro Conti, Nele Mentens:
SHeFU: Secure Hardware-Enabled Protocol for Firmware Updates. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j6]Md Masoom Rabbani, Jo Vliegen, Jori Winderickx, Mauro Conti, Nele Mentens:
SHeLA: Scalable Heterogeneous Layered Attestation. IEEE Internet Things J. 6(6): 10240-10250 (2019) - [j5]Niels Pirotte, Jo Vliegen, Lejla Batina, Nele Mentens:
Balancing elliptic curve coprocessors from bottom to top. Microprocess. Microsystems 71 (2019) - [c14]Jo Vliegen, Md Masoom Rabbani, Mauro Conti, Nele Mentens:
SACHa: Self-Attestation of Configurable Hardware. DATE 2019: 746-751 - [c13]Elif Bilge Kavun, Nele Mentens, Jo Vliegen, Tolga Yalçin:
Efficient Utilization of DSPs and BRAMs Revisited: New AES-GCM Recipes on FPGAs. ReConFig 2019: 1-2 - [i4]Jo Vliegen, Md Masoom Rabbani, Mauro Conti, Nele Mentens:
A Novel FPGA Architecture and Protocol for the Self-attestation of Configurable Hardware. IACR Cryptol. ePrint Arch. 2019: 405 (2019) - [i3]Elif Bilge Kavun, Nele Mentens, Jo Vliegen, Tolga Yalçin:
Efficient Utilization of DSPs and BRAMs Revisited: New AES-GCM Recipes on FPGAs. IACR Cryptol. ePrint Arch. 2019: 1380 (2019) - 2018
- [j4]Sujoy Sinha Roy, Kimmo Järvinen, Jo Vliegen, Frederik Vercauteren, Ingrid Verbauwhede:
HEPCloud: An FPGA-Based Multicore Processor for FV Somewhat Homomorphic Function Evaluation. IEEE Trans. Computers 67(11): 1637-1650 (2018) - [c12]Niels Pirotte, Jo Vliegen, Lejla Batina, Nele Mentens:
Design of a Fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves. DSD 2018: 545-552 - [i2]Nele Mentens, Vojtech Miskovský, Martin Novotný, Jo Vliegen:
High-speed Side-channel-protected Encryption and Authentication in Hardware. IACR Cryptol. ePrint Arch. 2018: 1088 (2018) - 2017
- [j3]Sujoy Sinha Roy, Frederik Vercauteren, Jo Vliegen, Ingrid Verbauwhede:
Hardware Assisted Fully Homomorphic Function Evaluation and Encrypted Search. IEEE Trans. Computers 66(9): 1562-1572 (2017) - [c11]Vladimir Rozic, Bohan Yang, Jo Vliegen, Nele Mentens, Ingrid Verbauwhede:
The Monte Carlo PUF. FPL 2017: 1-6 - [c10]Jo Vliegen, Oscar Reparaz, Nele Mentens:
Maximizing the throughput of threshold-protected AES-GCM implementations on FPGA. IVSW 2017: 140-145 - 2016
- [c9]Stjepan Picek, Bohan Yang, Vladimir Rozic, Jo Vliegen, Jori Winderickx, Thomas De Cnudde, Nele Mentens:
PRNGs for Masking Applications and Their Mapping to Evolvable Hardware. CARDIS 2016: 209-227 - 2015
- [j2]Jo Vliegen, Nele Mentens, Dirk Koch, Dries Schellekens, Ingrid Verbauwhede:
Practical feasibility evaluation and improvement of a pay-per-use licensing scheme for hardware IP cores in Xilinx FPGAs. J. Cryptogr. Eng. 5(2): 113-122 (2015) - [j1]Jo Vliegen, Nele Mentens, Ingrid Verbauwhede:
Secure, Remote, Dynamic Reconfiguration of FPGAs. ACM Trans. Reconfigurable Technol. Syst. 7(4): 35:1-35:19 (2015) - [c8]Nele Mentens, Jochen Vandorpe, Jo Vliegen, An Braeken, Bruno da Silva, Abdellah Touhafi, Alois Kern, Stephan Knappmann, Jens Rettkowski, Muhammed Al Kadi, Diana Göhringer, Michael Hübner:
DynamIA: Dynamic Hardware Reconfiguration in Industrial Applications. ARC 2015: 513-518 - 2013
- [c7]Jochen Vandorpe, Jo Vliegen, Ruben Smeets, Nele Mentens, Milos Drutarovský, Michal Varchola, Kerstin Lemke-Rust, Paul Plöger, Peter Samarin, Dirk Koch, Yngve Hafting, Jim Tørresen:
Remote FPGA design through eDiViDe - European Digital Virtual Design Lab. FPL 2013: 1 - [c6]Jo Vliegen, Nele Mentens, Ingrid Verbauwhede:
A single-chip solution for the secure remote configuration of FPGAs using bitstream compression. ReConFig 2013: 1-6 - 2012
- [c5]Jo Vliegen, Karel Wouters, Christian Grahn, Tobias Pulls:
Hardware Strengthening a Distributed Logging Scheme. DSD 2012: 171-176 - 2011
- [c4]An Braeken, Jan Genoe, Serge Kubera, Nele Mentens, Abdellah Touhafi, Ingrid Verbauwhede, Yannick Verbelen, Jo Vliegen, Karel Wouters:
Secure remote reconfiguration of an FPGA-based embedded system. ReCoSoC 2011: 1-6 - 2010
- [c3]Jo Vliegen, Nele Mentens, Jan Genoe, An Braeken, Serge Kubera, Abdellah Touhafi, Ingrid Verbauwhede:
A compact FPGA-based architecture for elliptic curve cryptography over prime fields. ASAP 2010: 313-316 - [c2]Lejla Batina, Jip Hogenboom, Nele Mentens, Joren Moelans, Jo Vliegen:
Side-channel evaluation of FPGA implementations of binary Edwards curves. ICECS 2010: 1248-1251 - [i1]Nele Mentens, Jo Vliegen, An Braeken, Abdellah Touhafi, Karel Wouters, Ingrid Verbauwhede:
Secure remote reconfiguration of FPGAs. Dynamically Reconfigurable Architectures 2010
2000 – 2009
- 2009
- [c1]An Braeken, Serge Kubera, Frederik Trouillez, Abdellah Touhafi, Nele Mentens, Jo Vliegen:
Secure FPGA technologies and techniques. FPL 2009: 560-563
Coauthor Index
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last updated on 2024-12-05 20:43 CET by the dblp team
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