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2010 – 2019
- 2016
[j10]Wen-Chung Kuo, Chi-Sheng Lin, Chen-Tsun Chuang, Ming-Chih Kao:
Simultaneous and Anonymous Mobile Network Authentication Scheme Based on Chaotic Maps. Inf. Technol. Control. 45(2): 208-213 (2016)- 2013
- [j9]Chi-Sheng Lin, Jia-Chin Lin:
Physical-layer transceiving techniques on data-aided orthogonal frequency-division multiplexing towards seamless service on vehicular communications. IET Commun. 7(8) (2013) - [j8]Shiuh-Chuan Her, Chi-Sheng Lin:
Vibration Analysis of Composite Laminate Plate Excited by Piezoelectric Actuators. Sensors 13(3): 2997-3013 (2013) - [j7]Chi-Sheng Lin, Che-Kang Sun, Jia-Chin Lin, Bo-Chiuan Chen:
Performance evaluations of channel estimations in IEEE 802.11p environments. Telecommun. Syst. 52(4): 1731-1742 (2013) - 2012
- [j6]Jia-Chin Lin, Chi-Sheng Lin, Chih-Neng Liang, Bo-Chiuan Chen:
Wireless communication performance based on IEEE 802.11p R2V field trials. IEEE Commun. Mag. 50(5): 184-191 (2012) - 2011
- [j5]Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey:
A 5.5-GHz 1-mW Full-Modulus-Range Programmable Frequency Divider in 90-nm CMOS Process. IEEE Trans. Circuits Syst. II Express Briefs 58-II(9): 550-554 (2011) - [c12]Tsung-Che Lu, Lan-Da Van, Chi-Sheng Lin, Chun-Ming Huang:
A 0.5V 1KS/s 2.5nW 8.52-ENOB 6.8fJ/conversion-step SAR ADC for biomedical applications. CICC 2011: 1-4 - 2010
- [j4]Shiuh-Chuan Her, Chi-Sheng Lin:
Deflection of Cross-Ply Composite Laminates Induced by Piezoelectric Actuators. Sensors 10(1): 719-733 (2010) - [c11]Chi-Sheng Lin, Jia-Chin Lin:
Improved time-domain channel estimation techniques in IEEE 802.11p environments. CSNDSP 2010: 437-442 - [c10]Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey:
An effective phase detector for phase-locked loops with wide capture range and fast acquisition time. ISCAS 2010: 1843-1846 - [c9]Ting-Hsu Chien, Chi-Sheng Lin, Chin-Long Wey, Ying-Zong Juang, Chun-Ming Huang:
High-speed and low-power programmable frequency divider. ISCAS 2010: 4301-4304 - [c8]Chi-Sheng Lin, Jia-Chin Lin:
Novel Channel Estimation Techniques in IEEE 802.11p Environments. VTC Spring 2010: 1-5
2000 – 2009
- 2009
- [j3]Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey, Chun-Ming Huang, Ying-Zong Juang:
An Edge Missing Compensator for Fast Settling Wide Locking Range Phase-Locked Loops. IEEE J. Solid State Circuits 44(11): 3102-3110 (2009) - [c7]Chi-Sheng Lin, Che-Kang Sun, Jia-Chin Lin, Bo-Chiuan Chen:
Performance evaluations of channel estimations in IEEE 802.11p environments. ICUMT 2009: 1-5 - [c6]Ting-Hsu Chien, Chi-Sheng Lin, Ying-Zong Juang, Chun-Ming Huang, Chin-Long Wey:
An edge-missing compensator for fast-settling wide-locking-range PLLs. ISSCC 2009: 394-395 - 2006
- [c5]Ruei-Jhe Tsai, Hsin-Wen Ting, Chi-Sheng Lin, Bin-Da Liu:
A CAM/WTA-Based High Speed and Low Power Longest Prefix Matching Circuit Design. APCCAS 2006: 426-429 - 2004
- [c4]Hui-Chin Tseng, Hsin-Hung Ou, Chi-Sheng Lin, Bin-Da Liu:
A low-power rail-to-rail 6-bit flash ADC based on a novel complementary average-value approach. ISLPED 2004: 252-256 - 2003
- [j2]Chi-Sheng Lin, Bin-Da Liu:
A new successive approximation architecture for low-power low-cost CMOS A/D converter. IEEE J. Solid State Circuits 38(1): 54-62 (2003) - [j1]Chi-Sheng Lin, Jui-Chuan Chang, Bin-Da Liu:
A low-power precomputation-based fully parallel content-addressable memory. IEEE J. Solid State Circuits 38(4): 654-662 (2003) - [c3]Chi-Sheng Lin, Kuan-Hua Chen, Bin-Da Liu:
Low-power and low-voltage fully parallel content-addressable memory. ISCAS (5) 2003: 373-376 - 2002
- [c2]Shin-Hong Ou, Chi-Sheng Lin, Bin-Da Liu:
A scalable sorting architecture based on maskable WTA/MAX circuit. ISCAS (4) 2002: 209-212 - [c1]Chi-Sheng Lin, Bin-Da Liu:
Design of a pipelined and expandable sorting architecture with simple control scheme. ISCAS (4) 2002: 217-220
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