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Dun-An Yang
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2020 – today
- 2022
- [c4]Zih-Ming Huang, Dun-An Yang, Jing-Jia Liou, Harry H. Chen:
FPGA-Based Emulation for Accelerating Transient Fault Reduction Analysis. ATS 2022: 144-149 - [c3]Dun-An Yang, Jing-Jia Liou, Harry H. Chen:
Transient Fault Pruning for Effective Candidate Reduction in Functional Debugging. ITC 2022: 73-81 - 2021
- [c2]Dun-An Yang, Jing-Jia Liou, Harry H. Chen:
Analyzing Transient Faults and Functional Error Rates of a RISC-V Core: A Case Study. ATS 2021: 133-138 - [c1]Dun-An Yang, Yu-Teng Chang, Ting-Shuo Hsu, Jing-Jia Liou, Harry H. Chen:
ACE-Pro: Reduction of Functional Errors with ACE Propagation Graph. ITC 2021: 10-19
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last updated on 2024-04-25 05:55 CEST by the dblp team
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