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ORCIDKunal Banerjee 0001
Person information
- affiliation: Walmart Global Tech, Bangalore, India
- affiliation (former): Intel Corporation, Bangalore, India
- affiliation (former): IIT Kharagpur
Other persons with the same name
- Kunal Banerjee 0002 — Haldia Institute of Technology, Haldia, India
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2020 – today
- 2024
[c39]Saptarshi Misra
, Kunal Banerjee, Anirban Chatterjee:
BARGAIN: A Super-Resolution Technique to Gain High-Resolution Images for Barcodes. COMAD/CODS 2024: 464-468- [c38]Soumik Dasgupta, Anurag Wagh, Lalitdutt Parsai, Binay Gupta, Geet Vudata, Shally Sangal, Sohom Majumdar, Hema Rajesh, Kunal Banerjee, Anirban Chatterjee:
waLLMartCache: A Distributed, Multi-tenant and Enhanced Semantic Caching System for LLMs. ICPR (7) 2024: 232-248 - 2023
- [c37]Binay Gupta, Saptarshi Misra, Anirban Chatterjee, Kunal Banerjee:
Are you a Foodie looking for New Cookies to try out? Better not ask an LLM. AIMLSystems 2023: 40:1-40:4 - [c36]Saptarshi Misra, Pranay Dugar, Anirban Chatterjee, Lalitdutt Parsai, Kunal Banerjee:
Designing a Vision Transformer based Enhanced Text Extractor for Product Images. COMAD/CODS 2023: 208-212 - [c35]Meet Maheshwari, Binay Gupta, Anirban Chatterjee, Kunal Banerjee:
A Dynamic Attention Based Graph Neural Network for Anomaly Prediction in Multi-Variate Time-Series & Its Application in Network Monitoring. COMAD/CODS 2023: 233-237 - [c34]Archit Bansal, Kunal Banerjee, Abhijnan Chakraborty:
These Deals Won't Last! Longevity, Uniformity, and Bias in Product Badge Assignment in eCommerce Platforms. eCom@SIGIR 2023 - 2022
- [c33]Subhadip Paul, Anirban Chatterjee, Binay Gupta, Kunal Banerjee:
Developing a noise-aware AI system for change risk assessment with minimal human intervention. CIKM Workshops 2022 - [c32]Rahul Bajaj, Kunal Banerjee, Lalitdutt Parsai, Deepansh Goyal, Sachin Parmar, Divyajyothi Bn, Balamurugan Subramaniam, Chaitanya Sai, Tarun Balotia, Anirban Chatterjee, Kailash Sati:
WALTS: Walmart AutoML Libraries, Tools and Services. SEAA 2022: 21-28 - [c31]Binay Gupta, Anirban Chatterjee, Subhadip Paul, Harika Matha, Lalitdutt Parsai, Kunal Banerjee, Vijay Agneeswaran:
Look before You Leap! Designing a Human-centered AI System for Change Risk Assessment. ICAART (3) 2022: 655-662 - [c30]Arkadip Basu, Rishi Singh, Chenyang Yu, Amarjeet Prasad, Kunal Banerjee:
Designing, Developing and Deploying an Enterprise Scale Network Monitoring System. ISEC 2022: 18:1-18:5 - [c29]Pranay Dugar, Aditya Vikram, Anirban Chatterjee, Kunal Banerjee, Vijay Agneeswaran:
Don't Miss the Fine Print! An Enhanced Framework to Extract Text from Low Resolution Images. VISIGRAPP (5: VISAPP) 2022: 664-671 - [i12]Archit Bansal, Kunal Banerjee, Abhijnan Chakraborty:
These Deals Won't Last! Longevity, Uniformity and Bias in Product Badge Assignment in E-Commerce Platforms. CoRR abs/2204.12552 (2022) - [i11]Vishwas Choudhary, Binay Gupta, Anirban Chatterjee, Subhadip Paul, Kunal Banerjee, Vijay Agneeswaran:
Detecting Concept Drift in the Presence of Sparsity - A Case Study of Automated Change Risk Assessment System. CoRR abs/2207.13287 (2022) - 2021
- [c28]Arkadip Basu, Kunal Banerjee:
Designing a Bot for Efficient Distribution of Service Requests. BotSE@ICSE 2021: 16-20 - [c27]Pranay Dugar, Rajesh Shreedhar Bhat, Asit Sharad Tarsode, Uddipto Dutta, Kunal Banerjee, Anirban Chatterjee, Vijay Srinivas Agneeswaran:
From Pixels to Words: A Scalable Journey of Text Information from Product Images to Retail Catalog. CIKM 2021: 3787-3795 - [c26]Kunal Banerjee, Vishak Prasad C., Rishi Raj Gupta, Kartik Vyas, Anushree H., Biswajit Mishra:
Exploring Alternatives to Softmax Function. DeLTA 2021: 81-86 - [i10]Arkadip Basu, Kunal Banerjee:
Designing a Bot for Efficient Distribution of Service Requests. CoRR abs/2103.05970 (2021) - [i9]Binay Gupta, Anirban Chatterjee, Harika Matha, Kunal Banerjee, Lalitdutt Parsai, Vijay Srinivas Agneeswaran:
Look Before You Leap! Designing a Human-Centered AI System for Change Risk Assessment. CoRR abs/2108.07951 (2021) - 2020
- [c25]Evangelos Georganas, Kunal Banerjee, Dhiraj D. Kalamkar, Sasikanth Avancha, Anand Venkat, Michael J. Anderson, Greg Henry, Hans Pabst, Alexander Heinecke:
Harnessing Deep Learning via a Single Building Block. IPDPS 2020: 222-233 - [c24]Brunno F. Goldstein, Sudarshan Srinivasan, Dipankar Das, Kunal Banerjee, Leandro Santiago de Araújo, Victor da Cruz Ferreira, Alexandre Solon Nery, Sandip Kundu, Felipe M. G. França:
Reliability Evaluation of Compressed Deep Learning Models. LASCAS 2020: 1-5 - [i8]Kunal Banerjee, Vishak Prasad C., Rishi Raj Gupta, Karthik Vyas, Anushree H., Biswajit Mishra:
Exploring Alternatives to Softmax Function. CoRR abs/2011.11538 (2020)
2010 – 2019
- 2019
- [j8]Ramanuj Chouksey, Chandan Karfa, Kunal Banerjee, Pankaj Kumar Kalita, Purandar Bhaduri:
Counter-example generation procedure for path-based equivalence checkers. IET Softw. 13(4): 280-285 (2019) - [j7]Kunal Banerjee, Evangelos Georganas, Dhiraj D. Kalamkar, Barukh Ziv, Eden Segal, Cristina Anderson, Alexander Heinecke:
Optimizing Deep Learning RNN Topologies on Intel Architecture. Supercomput. Front. Innov. 6(3): 64-85 (2019) - [c23]Dhiraj D. Kalamkar, Kunal Banerjee, Sudarshan Srinivasan, Srinivas Sridharan, Evangelos Georganas, Mikhail E. Smorkalov, Cong Xu, Alexander Heinecke:
Training Google Neural Machine Translation on an Intel CPU Cluster. CLUSTER 2019: 1-10 - [i7]Kunal Banerjee, Chandan Karfa:
A Quick Introduction to Functional Verification of Array-Intensive Programs. CoRR abs/1905.09137 (2019) - [i6]Dhiraj D. Kalamkar, Dheevatsa Mudigere, Naveen Mellempudi, Dipankar Das, Kunal Banerjee, Sasikanth Avancha, Dharma Teja Vooturi, Nataraj Jammalamadaka, Jianyu Huang, Hector Yuen, Jiyan Yang, Jongsoo Park, Alexander Heinecke, Evangelos Georganas, Sudarshan Srinivasan, Abhisek Kundu, Misha Smelyanskiy, Bharat Kaul, Pradeep Dubey:
A Study of BFLOAT16 for Deep Learning Training. CoRR abs/1905.12322 (2019) - [i5]Evangelos Georganas, Kunal Banerjee, Dhiraj D. Kalamkar, Sasikanth Avancha, Anand Venkat, Michael J. Anderson, Greg Henry, Hans Pabst, Alexander Heinecke:
High-Performance Deep Learning via a Single Building Block. CoRR abs/1906.06440 (2019) - [i4]Abhisek Kundu, Sudarshan Srinivasan, Eric C. Qin, Dhiraj D. Kalamkar, Naveen K. Mellempudi, Dipankar Das, Kunal Banerjee, Bharat Kaul, Pradeep Dubey:
K-TanH: Hardware Efficient Activations For Deep Learning. CoRR abs/1909.07729 (2019) - 2018
- [c22]Dipankar Das, Naveen Mellempudi, Dheevatsa Mudigere, Dhiraj D. Kalamkar, Sasikanth Avancha, Kunal Banerjee, Srinivas Sridharan, Karthik Vaidyanathan, Bharat Kaul, Evangelos Georganas, Alexander Heinecke, Pradeep Dubey, Jesús Corbal, Nikita Shustrov, Roman Dubtsov, Evarist Fomenko, Vadim O. Pirogov:
Mixed Precision Training of Convolutional Neural Networks using Integer Operations. ICLR (Poster) 2018 - [c21]Kunal Banerjee, Ramanuj Chouksey, Chandan Karfa, Pankaj Kumar Kalita:
Automatic detection of inverse operations while avoiding loop unrolling. ICSE (Companion Volume) 2018: 175-176 - [c20]Kunal Banerjee, Chandan Karfa:
Compiler-agnostic Translation Validation. ISEC 2018: 22:1 - [c19]Evangelos Georganas, Sasikanth Avancha, Kunal Banerjee, Dhiraj D. Kalamkar, Greg Henry, Hans Pabst, Alexander Heinecke:
Anatomy of high-performance deep learning convolutions on SIMD architectures. SC 2018: 66:1-66:12 - [i3]Dipankar Das, Naveen Mellempudi, Dheevatsa Mudigere, Dhiraj D. Kalamkar, Sasikanth Avancha, Kunal Banerjee, Srinivas Sridharan, Karthik Vaidyanathan, Bharat Kaul, Evangelos Georganas, Alexander Heinecke, Pradeep Dubey, Jesús Corbal, Nikita Shustrov, Roman Dubtsov, Evarist Fomenko, Vadim O. Pirogov:
Mixed Precision Training of Convolutional Neural Networks using Integer Operations. CoRR abs/1802.00930 (2018) - [i2]Evangelos Georganas, Sasikanth Avancha, Kunal Banerjee, Dhiraj D. Kalamkar, Greg Henry, Hans Pabst, Alexander Heinecke:
Anatomy Of High-Performance Deep Learning Convolutions On SIMD Architectures. CoRR abs/1808.05567 (2018) - 2017
- [j6]Kunal Banerjee, Dipankar Sarkar, Chittaranjan A. Mandal:
Deriving bisimulation relations from path based equivalence checkers. Formal Aspects Comput. 29(2): 365-379 (2017) - [j5]Kunal Banerjee, Dipankar Sarkar, Chittaranjan Mandal:
Deriving Bisimulation Relations from Path Extension Based Equivalence Checkers. IEEE Trans. Software Eng. 43(10): 946-953 (2017) - [c18]Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar:
An Equivalence Checking Framework for Array-Intensive Programs. ATVA 2017: 84-90 - [c17]Soumyadip Bandyopadhyay, Kunal Banerjee:
PRESGen: A Fully Automatic Equivalence Checker for Validating Optimizing and Parallelizing Transformations. SEM4HPC@HPDC 2017: 13-20 - [c16]Soumyadip Bandyopadhyay, Santonu Sarkar, Kunal Banerjee:
An End-to-end Formal Verifier for Parallel Programs. ICSOFT 2017: 388-393 - [i1]Abhisek Kundu, Kunal Banerjee, Naveen Mellempudi, Dheevatsa Mudigere, Dipankar Das, Bharat Kaul, Pradeep Dubey:
Ternary Residual Networks. CoRR abs/1707.04679 (2017) - 2016
- [j4]Soumyadip Bandyopadhyay, Dipankar Sarkar, Chittaranjan A. Mandal, Kunal Banerjee, Krishnam Raju Duddu:
A Path Construction Algorithm for Translation Validation Using PRES+ Models. Parallel Process. Lett. 26(2): 1650010:1-1650010:18 (2016) - [c15]Soumyadip Bandyopadhyay, Kunal Banerjee:
Implementing an Efficient Path Based Equivalence Checker for Parallel Programs. SEM4HPC@HPDC 2016: 3-10 - [c14]Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar:
Translation validation of loop and arithmetic transformations in the presence of recurrences. LCTES 2016: 31-40 - [c13]Kunal Banerjee, Soumyadip Banerjee, Santonu Sarkar:
Data-race detection: the missing piece for an end-to-end semantic equivalence checker for parallelizing transformations of array-intensive programs. ARRAY@PLDI 2016: 1-8 - 2015
- [c12]Soumyadip Bandyopadhyay, Dipankar Sarkar, Kunal Banerjee, Chittaranjan A. Mandal:
A Path-based Equivalence Checking Method for Petri Net based Models of Programs. ICSOFT-EA 2015: 319-329 - [c11]Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar:
Translation Validation of Transformations of Embedded System Specifications Using Equivalence Checking. ISVLSI 2015: 183-186 - [c10]K. K. Sharma, Kunal Banerjee, Chittaranjan A. Mandal:
Establishing Equivalence of Expressions: An Automated Evaluator Designer's Perspective. MIKE 2015: 415-423 - [c9]Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar:
A translation validation framework for symbolic value propagation based equivalence checking of FSMDAs. SCAM 2015: 247-252 - [c8]K. K. Sharma, Kunal Banerjee, Chittaranjan A. Mandal:
Determining Equivalence of Expressions: An Automated Evaluator's Perspective. T4E 2015: 35-36 - 2014
- [j3]Kunal Banerjee, Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Mandal:
Verification of Code Motion Techniques Using Value Propagation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(8): 1180-1193 (2014) - [j2]Kunal Banerjee, Dipankar Sarkar, Chittaranjan A. Mandal:
Extending the FSMD Framework for Validating Code Motions of Array-Handling Programs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(12): 2015-2019 (2014) - [c7]Partha De, Kunal Banerjee, Chittaranjan A. Mandal, Debdeep Mukhopadhyay:
Circuits and Synthesis Mechanism for Hardware Design to Counter Power Analysis Attacks. DSD 2014: 520-527 - [c6]Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar:
Extending the scope of translation validation by augmenting path based equivalence checkers with SMT solvers. VDAT 2014: 1-6 - [c5]Partha De, Kunal Banerjee, Chittaranjan A. Mandal:
A BDD based secure hardware design method to guard against power analysis attacks. VDAT 2014: 1-2 - 2013
- [j1]Chandan Karfa, Kunal Banerjee, Dipankar Sarkar, Chittaranjan A. Mandal:
Verification of Loop and Arithmetic Transformations of Array-Intensive Behaviors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1787-1800 (2013) - [c4]Partha De, Kunal Banerjee, Chittaranjan A. Mandal, Debdeep Mukhopadhyay:
Designing DPA Resistant Circuits Using BDD Architecture and Bottom Pre-charge Logic. DSD 2013: 641-644 - 2012
- [c3]Kunal Banerjee, Chandan Karfa, Dipankar Sarkar, Chittaranjan Mandal:
A Value Propagation Based Equivalence Checking Method for Verification of Code Motion Techniques. ISED 2012: 67-71 - [c2]Soumyadip Bandyopadhyay, Kunal Banerjee, Dipankar Sarkar, Chittaranjan A. Mandal:
Translation Validation for PRES+ Models of Parallel Behaviours via an FSMD Equivalence Checker. VDAT 2012: 69-78 - 2011
- [c1]Chandan Karfa, Kunal Banerjee, Dipankar Sarkar, Chitta Mandal:
Equivalence Checking of Array-Intensive Programs. ISVLSI 2011: 156-161
Coauthor Index
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