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ORCIDJin-Young Chun
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2010 – 2019
- 2019
[j1]Junyoung Ko, Younghwi Yang, Jisu Kim, Cheon An Lee, Young-Sun Min, Jin-Young Chun, Moosung Kim, Seong-Ook Jung
:
Variation-Tolerant WL Driving Scheme for High-Capacity NAND Flash Memory. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1828-1839 (2019)- 2016
- [c2]Junyoung Ko, Younghwi Yang, Seong-Ook Jung, Jisu Kim, Cheon An Lee, Young-Sun Min, Jin-Young Chun, Moosung Kim:
WL under-driving scheme with decremental step voltage and incremental step time for high-capacity NAND flash memory. ISCAS 2016: 1022-1025 - 2012
- [c1]Daeyeal Lee, Ik Joon Chang, Sangyong Yoon, Joonsuc Jang, Dong-Su Jang, Wook-Ghee Hahn, Jong-Yeol Park, Doo-Gon Kim, Chiweon Yoon, Bong-Soon Lim, ByungJun Min, Sung-Won Yun, Ji-Sang Lee, Il-Han Park, Kyung-Ryun Kim, Jeong-Yun Yun, Youse Kim, Yong-Sung Cho, Kyung-Min Kang, Sang-Hyun Joo, Jin-Young Chun, Jung-No Im, Seunghyuk Kwon, Seokjun Ham, Ansoo Park, Jae-Duk Yu, Nam-Hee Lee, Tae-Sung Lee, Moosung Kim, Hoosung Kim, Ki-Whan Song, Byung-Gil Jeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun:
A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology. ISSCC 2012: 430-432
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