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2020 – today
- 2024
[j6]Shanthi Pavan
, Saravana Manivannan, Nishanth Basavaraj:
Analysis and Design of Wideband Filtering ADCs Using Continuous-Time Pipelining. IEEE J. Solid State Circuits 59(1): 268-281 (2024)- [c6]Snehalatha Lalithamma, Saravana Manivannan:
A Chopper-Stabilized Bandgap Reference with a Double-Sampled FIR Filter in 180-nm CMOS. ISCAS 2024: 1-5 - [c5]Snehalatha Lalithamma, Saravana Manivannan, Uddipan Agasti:
Analysis of Device Noise in Bandgap Reference Voltage Generators. VDAT 2024: 1-7 - 2023
- [c4]Endersh Soni, Saravana Manivannan:
Analysis of Switched-RC N-path filters with Finite Switch Resistance and Switched $G_{m}-C$ filters using the Adjoint Network. APCCAS 2023: 144-148 - 2022
- [j5]Shanthi Pavan, Saravana Manivannan:
Analysis of RC Time-Constant Variations in Continuous-Time Pipelined ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 69(2): 530-540 (2022) - [j4]Saravana Manivannan, Shanthi Pavan:
Improved Multistage Continuous-Time Pipelined Analog-to-Digital Converters and the Implicit Decimation Property. IEEE Trans. Circuits Syst. I Regul. Pap. 69(8): 3102-3113 (2022) - [j3]Nishanth Basavaraj, Saravana Manivannan, Shanthi Pavan:
Simplified Simulation and Measurement of the Signal Transfer Function of a Continuous-Time Pipelined Analog-to-Digital Converter. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 3993-3997 (2022) - [c3]Chaitanya Kumar, Saravana Manivannan, Shanthi Pavan:
Analysis of Flash ADC Loading on the Performance of a Continuous-Time Pipelined ADC. ISCAS 2022: 2792-2796 - 2020
- [j2]Saravana Manivannan, Shanthi Pavan:
Improved Continuous-Time Delta-Sigma Modulators With Embedded Active Filtering. IEEE Trans. Circuits Syst. 67-I(11): 3778-3789 (2020)
2010 – 2019
- 2019
- [c2]Saravana Manivannan, Shanthi Pavan:
Degradation of Alias Rejection in Continuous-Time Bandpass Delta-Sigma Converters due to Weak Loop Filter Nonlinearities. ISCAS 2019: 1-5 - 2018
- [j1]Saravana Manivannan, Shanthi Pavan:
Degradation of Alias Rejection in Continuous-Time Delta-Sigma Modulators by Weak Loop-Filter Nonlinearities. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3207-3215 (2018) - [c1]Saravana Manivannan, Shanthi Pavan:
A 1 MHz bandwidth, filtering continuous-time delta-sigma ADC with 36 dBFS out-of-band IIP3 and 76 dB SNDR. CICC 2018: 1-4
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