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2020 – today
- 2023
[c2]Yutaro Fujisaki, Hidenobu Tsugawa, K. Sakai, H. Kumagai, R. Nakamura, Tomoharu Ogita, S. Endo, T. Iwase, H. Takase, K. Yokochi, S. Yoshida, S. Shimada, Y. Otake, T. Wakano, H. Hiyama, K. Hagiwara, M. Arakawal, S. Matsumotol, H. Maeda, K. Sugihara, K. Takabayashi, M. Ono, K. Ishibashi, K. Yamamoto:
A back-illuminated 6 μm SPAD depth sensor with PDE 36.5% at 940 nm via combination of dual diffraction structure and 2×2 on-chip lens. VLSI Technology and Circuits 2023: 1-2
2010 – 2019
- 2017
- [c1]Tsutomu Haruta, Tsutomu Nakajima, Jun Hashizume, Taku Umebayashi, Hiroshi Takahashi, Kazuo Taniguchi, Masami Kuroda, Hiroshi Sumihiro, Koji Enoki
, Takatsugu Yamasaki, Katsuya Ikezawa, Atsushi Kitahara, Masao Zen, Masafumi Oyama, Hiroki Koga, Hidenobu Tsugawa, Tomoharu Ogita, Takashi Nagano, Satoshi Takano, Tetsuo Nomoto:
4.6 A 1/2.3inch 20Mpixel 3-layer stacked CMOS Image Sensor with DRAM. ISSCC 2017: 76-77
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last updated on 2024-04-25 05:51 CEST by the dblp team
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