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Roberto Giorgio Rizzo
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2020 – today
- 2021
- [j3]Roberto Giorgio Rizzo, Valentino Peluso, Andrea Calimera:
TVFS: Topology Voltage Frequency Scaling for Reliable Embedded ConvNets. IEEE Trans. Circuits Syst. II Express Briefs 68(2): 672-676 (2021) - [c10]Luca Mocerino, Roberto Giorgio Rizzo, Valentino Peluso, Andrea Calimera, Enrico Macii:
AdapTTA: Adaptive Test-Time Augmentation for Reliable Embedded ConvNets. VLSI-SoC 2021: 1-6 - [c9]Luca Mocerino, Roberto Giorgio Rizzo, Valentino Peluso, Andrea Calimera, Enrico Macii:
On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets. VLSI-SoC (Selected Papers) 2021: 1-23 - [i1]Luca Mocerino, Roberto Giorgio Rizzo, Valentino Peluso, Andrea Calimera, Enrico Macii:
Adaptive Test-Time Augmentation for Low-Power CPU. CoRR abs/2105.06183 (2021) - 2020
- [j2]Roberto Giorgio Rizzo, Andrea Calimera, Jun Zhou:
Corrigendum to"Approximate error detection-correction for efficient adaptive voltage Over-Scaling"[Integration 63 (2018) 220-231]. Integr. 70: 159 (2020)
2010 – 2019
- 2019
- [b1]Roberto Giorgio Rizzo:
Energy-Accuracy Scaling in Digital ICs: Static and Adaptive Design Methods and Tools. Polytechnic University of Turin, Italy, 2019 - [c8]Valerio Tenace, Roberto Giorgio Rizzo, Debjyoti Bhattacharjee, Anupam Chattopadhyay, Andrea Calimera:
SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars. DATE 2019: 372-377 - [c7]Valentino Peluso, Roberto Giorgio Rizzo, Antonio Cipolletta, Andrea Calimera:
Inference on the Edge: Performance Analysis of an Image Classification Task Using Off-The-Shelf CPUs and Open-Source ConvNets. SNAMS 2019: 454-459 - 2018
- [j1]Roberto Giorgio Rizzo, Andrea Calimera, Jun Zhou:
Approximate Error Detection-Correction for efficient Adaptive Voltage Over-Scaling. Integr. 63: 220-231 (2018) - [c6]Roberto Giorgio Rizzo, Valerio Tenace, Andrea Calimera:
Multiplication by Inference using Classification Trees: A Case-Study Analysis. ISCAS 2018: 1-5 - 2017
- [c5]Roberto Giorgio Rizzo, Andrea Calimera:
Tunable Error Detection-Correction for Efficient Adaptive Voltage Over-Scaling. NGCAS 2017: 13-16 - [c4]Roberto Giorgio Rizzo, Valentino Peluso, Andrea Calimera, Jun Zhou, Xin Liu:
Early bird sampling: A short-paths free error detection-correction strategy for data-driven VOS. VLSI-SoC 2017: 1-6 - [c3]Roberto Giorgio Rizzo, Valentino Peluso, Andrea Calimera, Jun Zhou:
On the Efficiency of Early Bird Sampling (EBS) an Error Detection-Correction Scheme for Data-Driven Voltage Over-Scaling. VLSI-SoC (Selected Papers) 2017: 153-177 - 2016
- [c2]Valentino Peluso, Roberto Giorgio Rizzo, Andrea Calimera, Enrico Macii, Massimo Alioto:
Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping. VLSI-SoC (Selected Papers) 2016: 152-172 - 2015
- [c1]Roberto Giorgio Rizzo, Sandeep Miryala, Andrea Calimera, Enrico Macii, Massimo Poncino:
Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions. ACM Great Lakes Symposium on VLSI 2015: 253-258
Coauthor Index
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