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ORCIDSudarsan Vasista Srinivasan Ranganathan
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2010 – 2019
- 2019
[j4]Haobo Wang
, Sudarsan V. S. Ranganathan, Richard D. Wesel:
Variable-Length Coding With Shared Incremental Redundancy: Design Methods and Examples. IEEE Trans. Commun. 67(9): 5981-5995 (2019)- [j3]Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel:
Quasi-Cyclic Protograph-Based Raptor-Like LDPC Codes for Short Block-Lengths. IEEE Trans. Inf. Theory 65(6): 3758-3777 (2019) - [c13]Nathan Wong, Ethan Liang, Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel:
Decoding Flash Memory with Progressive Reads and Independent vs. Joint Encoding of Bits in a Cell. GLOBECOM 2019: 1-6 - 2018
- [b1]Sudarsan Vasista Srinivasan Ranganathan:
Advances in Protograph-Based LDPC Codes and a Rate Allocation Problem. University of California Los Angeles, USA, 2018 - [c12]Hengjie Yang, Sudarsan V. S. Ranganathan, Richard D. Wesel:
Serial List Viterbi Decoding with CRC: Managing Errors, Erasures, and Complexity. GLOBECOM 2018: 1-6 - [c11]Sudarsan V. S. Ranganathan, Richard D. Wesel, Dariush Divsalar:
Linear Rate-Compatible Codes with Degree-1 Extending Variable Nodes Under Iterative Decoding. ISIT 2018: 1166-1170 - 2017
- [j2]Sudarsan V. S. Ranganathan, Tong Mu, Richard D. Wesel:
Allocating Redundancy Between Erasure Coding and Channel Coding When Fading Channel Diversity Grows With Codeword Length. IEEE Trans. Commun. 65(8): 3226-3237 (2017) - [c10]Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel:
Approaching capacity using incremental redundancy without feedback. ISIT 2017: 161-165 - [c9]Haobo Wang, Nathan Wong, Alexander M. Baldauf, Christopher K. Bachelor, Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel:
An information density approach to analyzing and optimizing incremental redundancy with feedback. ISIT 2017: 261-265 - [c8]Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel:
Design of improved quasi-cyclic protograph-based Raptor-like LDPC codes for short block-lengths. ISIT 2017: 1207-1211 - [c7]Nathan Wong, Kasra Vakilinia, Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel:
Sequential differential optimization of incremental redundancy transmission lengths: An example with tail-biting convolutional codes. ITA 2017: 1-5 - [i4]Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel:
Design of Improved Quasi-Cyclic Protograph-Based Raptor-Like LDPC Codes for Short Block-Lengths. CoRR abs/1701.07531 (2017) - 2016
- [j1]Kasra Vakilinia, Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel:
Optimizing Transmission Lengths for Limited Feedback With Nonbinary LDPC Examples. IEEE Trans. Commun. 64(6): 2245-2257 (2016) - [c6]Sudarsan V. S. Ranganathan, Kasra Vakilinia, Dariush Divsalar, Richard D. Wesel:
Universal rate-compatible LDPC code families for any increment ordering. ISTC 2016: 101-105 - [c5]Sudarsan V. S. Ranganathan, Kasra Vakilinia, Lara Dolecek, Dariush Divsalar, Richard D. Wesel:
Some results on spatially coupled protograph LDPC codes. ITA 2016: 1-6 - [i3]Sudarsan V. S. Ranganathan, Tong Mu, Richard D. Wesel:
Optimality and Rate-Compatibility for Erasure-Coded Packet Transmissions when Fading Channel Diversity Increases with Packet Length. CoRR abs/1602.00761 (2016) - [i2]Kasra Vakilinia, Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel:
Optimizing Transmission Lengths for Limited Feedback with Non-Binary LDPC Examples. CoRR abs/1602.05072 (2016) - 2015
- [c4]Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel:
On the girth of (3, L) quasi-cyclic LDPC codes based on complete protographs. ISIT 2015: 431-435 - [i1]Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel:
On the Girth of (3, L) Quasi-Cyclic LDPC Codes based on Complete Protographs. CoRR abs/1504.04975 (2015) - 2014
- [c3]Kasra Vakilinia, Tsung-Yi Chen, Sudarsan Vasista Srinivasan Ranganathan, Adam R. Williamson, Dariush Divsalar, Richard D. Wesel:
Short-blocklength non-binary LDPC codes with feedback-dependent incremental transmissions. ISIT 2014: 426-430 - [c2]Sudarsan Vasista Srinivasan Ranganathan, Dariush Divsalar, Kasra Vakilinia, Richard D. Wesel:
Design of high-rate irregular non-binary LDPC codes using algorithmic stopping-set cancellation. ISIT 2014: 711-715 - [c1]Kasra Vakilinia, Adam R. Williamson, Sudarsan Vasista Srinivasan Ranganathan, Dariush Divsalar, Richard D. Wesel:
Feedback systems using non-binary LDPC codes with a limited number of transmissions. ITW 2014: 167-171
Coauthor Index
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