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2010 – 2019
- 2019
[j3]Jun-Sang Park
, Tai-Ji An, Gil-Cho Ahn, Seung-Hoon Lee:
A 12.1 fJ/Conv.-Step 12b 140 MS/s 28-nm CMOS Pipelined SAR ADC Based on Energy-Efficient Switching and Shared Ring Amplifier. IEEE Trans. Circuits Syst. II Express Briefs 66-II(7): 1119-1123 (2019)- 2018
- [j2]Tai-Ji An, Moon-Sang Hwang, Won-Jun Choe, Gil-Cho Ahn, Seung-Hoon Lee:
Area-Efficient Time-Shared Digital-to-Analog Converter With Dual Sampling for AMOLED Column Driver IC's. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3227-3240 (2018) - 2013
- [j1]Hyo-Jin Kim, Tai-Ji An, Sungmeen Myung, Seung-Hoon Lee:
Time-Interleaved and Circuit-Shared Dual-Channel 10 b 200 MS/s 0.18 µm CMOS Analog-to-Digital Convertor. IEEE Trans. Very Large Scale Integr. Syst. 21(12): 2206-2213 (2013) - [c3]Tai-Ji An, Jun-Sang Park, Yongmin Kim, Suk-Hee Cho, Gil-Cho Ahn, Seung-Hoon Lee:
10b 150MS/s 0.4mm2 45nm CMOS ADC based on process-insensitive amplifiers. ISCAS 2013: 316- - 2012
- [c2]Sang-Pil Nam, Yongmin Kim, Dong-Hyun Hwang, Hyo-Jin Kim, Tai-Ji An, Jun-Sang Park, Suk-Hee Cho, Gil-Cho Ahn, Seung-Hoon Lee:
A 10b 1MS/s-to-10MS/s 0.11um CMOS SAR ADC for analog TV applications. ISOCC 2012: 124-127 - 2011
- [c1]Dong-Hyun Hwang, Jung-Eun Song, Sang-Pil Nam, Hyo-Jin Kim, Tai-Ji An, Kwang-Soo Kim, Seung-Hoon Lee:
A range-scaled 13b 100MS/s 0.13μm CMOS SHA-free ADC based on a single reference. ISOCC 2011: 62-65
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