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2010 – 2019
- 2014
[c2]Socrates D. Vamvakos, Charles Boecker, Eric Groen, Alvin Wang, Shaishav Desai, Scott Irwin, Vithal Rao, Aldo Bottelli, Jawji Chen, Xiaole Chen, Prashant Choudhary, Kuo-Chiang Hsieh, Paul Jennings, Haidang Lin, Dan Pechiu, Chethan Rao, Jason Yeung:
A 8.125-15.625 Gb/s SerDes using a sub-sampling ring-oscillator phase-locked loop. CICC 2014: 1-4- 2012
- [c1]Socrates D. Vamvakos, Bendik Kleveland, Dipak K. Sikdar, B. K. Ahuja, Haidang Lin, Jayaprakash Balachandran, Wignes Balakrishnan, Aldo Bottelli, Jawji Chen, Xiaole Chen, Jae Choi, Jeong Choi, Rajesh Chopra, Sanjay Dabral, Kalyan Dasari, Ronald B. David, Shaishav Desai, Claude R. Gauthier, Mahmudul Hassan, Kuo-Chiang Hsieh, Ramosan Canagasaby, Jeff Kumala, E. P. Kwon, Ben Lee, Ming Liu, Gurupada Mandal, Sundari Mitra, Byeong Cheol Na, Siddharth Panwar, Jay Patel, Chethan Rao, Vithal Rao, Richard Rouse, Ritesh Saraf, Subramanian Seshadri, Jae-K. Sim, Clement Szeto, Alvin Wang, Jason Yeung:
A 576 Mb DRAM with 16-channel 10.3125Gbps serial I/O and 14.5 ns latency. ESSCIRC 2012: 458-461
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