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2010 – 2019
- 2015
[j21]Ryan Clarke, Philip Jacob, Okan Erdogan, Paul Belemijian, Srikumar Raman, Mitchell R. LeRoy, Tuhin Guha Neogi, Russell P. Kraft, Diana-Andra Borca-Tasciuc, John F. McDonald:
Thermal Modeling of 3-D Stacked DRAM Over SiGe HBT BiCMOS CPU. IEEE Access 3: 43-54 (2015)- [j20]Ryan Clarke, Mitchell R. LeRoy, Srikumar Raman, Tuhin Guha Neogi, Russell P. Kraft, John F. McDonald:
140 Gb/s Serializer Using Clock Doublers in 90 nm SiGe Technology. IEEE J. Solid State Circuits 50(11): 2703-2713 (2015) - 2014
- [j19]Xuelian Liu, Mitchell R. LeRoy, Ryan Clarke, Michael Chu, H. O. Aquino
, Srikumar Raman, Aamir Zia, Russell P. Kraft, John F. McDonald:
Design of BiCMOS SRAMs for high-speed SiGe applications. IET Circuits Devices Syst. 8(6): 487-498 (2014) - [j18]Xuelian Liu, Srikumar Raman, Ryan Clarke, Mitchell R. LeRoy, Okan Erdogan, Michael Chu, Alexey Gutin, Russell P. Kraft, John F. McDonald:
Design of High-Speed Register Files Using SiGe HBT BiCMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 61-II(3): 178-182 (2014) - 2012
- [c20]Xuelian Liu, Aamir Zia, Mitchell R. LeRoy, Srikumar Raman, Ryan Clarke, Russell P. Kraft, John F. McDonald:
A three-dimensional DRAM using floating body cell in FDSOI devices. DDECS 2012: 159-162 - 2011
- [j17]Jin Woo Kim, Michael Chu, Philip Jacob, Aamir Zia, Russell P. Kraft, John F. McDonald:
Reconfigurable 40 GHz BiCMOS uniform delay crossbar switch for broadband and wide tuning range narrowband applications. IET Circuits Devices Syst. 5(3): 159-169 (2011) - [j16]Alexey Gutin, Philip Jacob, Michael Chu, Paul M. Belemjian, Mitchell R. LeRoy, Russell P. Kraft, John F. McDonald:
Carry Chains for Ultra High-Speed SiGe HBT Adders. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(9): 2201-2210 (2011) - 2010
- [j15]Michael Chu, Philip Jacob, Jin Woo Kim, Mitchell R. LeRoy, Russell P. Kraft, John F. McDonald:
A 40 Gs/s Time Interleaved ADC Using SiGe BiCMOS Technology. IEEE J. Solid State Circuits 45(2): 380-390 (2010) - [j14]Michael Chu, Philip Jacob, Jin Woo Kim, Mitchell R. LeRoy, Russell P. Kraft, John F. McDonald:
Correction to "A 40 GS/s Time Interleaved ADC Using SiGe BiCMOS Technology". IEEE J. Solid State Circuits 45(10): 2210 (2010) - [j13]Aamir Zia, Philip Jacob, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald:
A 3-D Cache With Ultra-Wide Data Bus for 3-D Processor-Memory Integration. IEEE Trans. Very Large Scale Integr. Syst. 18(6): 967-977 (2010)
2000 – 2009
- 2009
- [j12]Philip Jacob, Aamir Zia, Okan Erdogan, Paul M. Belemjian, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald, Kerry Bernstein:
Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks. Proc. IEEE 97(1): 108-122 (2009) - [c19]John F. McDonald, Okan Erdogan, Philip Jacob, Paul M. Belemjian, Alexey Gutin, Aamir Zia, Michael Chu, Jin Woo Kim, Ryan Clarke, Nate DeSimone, Sherry Liu, Russell P. Kraft:
Thermal analysis for a SiGe HBT 40 watt 32 GHz clock 3D memory processor chip stack using diamond heat spreader layers. 3DIC 2009: 1-7 - 2007
- [j11]Jong-Ru Guo, Chao You, Mike Chu, Peter F. Curran, Jiedong Diao, Bryan S. Goda, Peng Jin, Russell P. Kraft, John F. McDonald:
Silicon germanium programmable circuits for gigahertz applications. IET Circuits Devices Syst. 1(1): 27-33 (2007) - [j10]Young Uk Yim, Peter F. Curran, Michael Chu, John F. McDonald, Russell P. Kraft:
52 Gb/s 16: 1 transmitter in 0.13 μm SiGe BiCMOS technology. IET Circuits Devices Syst. 1(6): 427-432 (2007) - [j9]Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Bryan S. Goda, John F. McDonald:
A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits. IEEE Trans. Very Large Scale Integr. Syst. 15(9): 1051-1054 (2007) - [c18]Philip Jacob, Aamir Zia, Okan Erdogan, Paul M. Belemjian, Peng Jin, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald:
Amdahl's figure of merit, SiGe HBT BiCMOS, and 3D chip stacking. ICCD 2007: 202-207 - 2005
- [j8]Philip Jacob, Okan Erdogan, Aamir Zia, Paul M. Belemjian, Russell P. Kraft, John F. McDonald:
Predicting the Performance of a 3D Processor-Memory Chip Stack. IEEE Des. Test Comput. 22(6): 540-547 (2005) - [j7]Jong-Ru Guo, Chao You, Kuan Zhou, Michael Chu, Peter F. Curran, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald:
A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC. Integr. 38(3): 525-540 (2005) - [j6]Kuan Zhou, Jong-Ru Guo, Chao You, John Mayega, Russell P. Kraft, T. Zhang, John F. McDonald, Bryan S. Goda:
Multi-ghz Sige Bicmos Fpgas with New Architecture and Novel Power Management Techniques. J. Circuits Syst. Comput. 14(2): 179-194 (2005) - [j5]Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Peter F. Curran, Kuan Zhou, Bryan S. Goda, John F. McDonald:
A 5-10GHz SiGe BiCMOS FPGA with new configurable logic block. Microprocess. Microsystems 29(2-3): 121-131 (2005) - [j4]Paul M. Belemjian, Okan Erdogan, Russell P. Kraft, John F. McDonald:
SiGe HBT Microprocessor Core Test Vehicle. Proc. IEEE 93(9): 1669-1678 (2005) - [c17]Chao You, Jong-Ru Guo, Michael Chu, Russell P. Kraft, Bryan S. Goda, John F. McDonald:
A 11 GHz FPGA with Test Applications. FPL 2005: 101-105 - [c16]Jong-Ru Guo, Chao You, Michael Chu, Okan Erdogan, Russell P. Kraft, John F. McDonald:
A High Speed Reconfigurable Gate Array for Gigahertz Applications. ISVLSI 2005: 124-129 - [c15]Young Uk Yim, John F. McDonald, Russell P. Kraft:
12-23 GHz Ultra Wide Tuning Range Voltage-Controlled Ring Oscillator with Hybrid Control Schemes. ISVLSI 2005: 278-279 - 2004
- [c14]Jong-Ru Guo, Chao You, Michael Chu, Robert W. Heikaus, Kuan Zhou, Okan Erdogan, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald:
The gigahertz FPGA: design consideration and applications. FPGA 2004: 248 - [c13]Jong-Ru Guo, Chao You, Peter F. Curran, Michael Chu, Kuan Zhou, Jiedong Diao, A. George, Russell P. Kraft, John F. McDonald:
The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA. ACM Great Lakes Symposium on VLSI 2004: 141-144 - 2003
- [c12]Jong-Ru Guo, Chao You, Michael Chu, Kuan Zhou, Young Uk Yim, Robert W. Heikaus, Russell P. Kraft, John F. McDonald:
A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA. Engineering of Reconfigurable Systems and Algorithms 2003: 181-187 - [c11]Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, Russell P. Kraft, John F. McDonald:
A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology. FPGA 2003: 145-153 - [c10]Kuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda:
A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme. FPGA 2003: 248 - [c9]Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Robert W. Heikaus, Okan Erdogan, Peter F. Curran, Bryan S. Goda, Kuan Zhou, John F. McDonald:
Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory. FPL 2003: 11-20 - [c8]Chao You, Jong-Ru Guo, Russell P. Kraft, Kuan Zhou, Michael Chu, John F. McDonald:
A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology. ACM Great Lakes Symposium on VLSI 2003: 37-40 - [c7]John Mayega, Okan Erdogan, Paul M. Belemjian, Kuan Zhou, John F. McDonald, Russell P. Kraft:
3D direct vertical interconnect microprocessors test vehicle. ACM Great Lakes Symposium on VLSI 2003: 141-146 - 2002
- [c6]Channakeshav, Kuan Zhou, Russell P. Kraft, John F. McDonald:
Gigahertz FPGAs with New Power Saving Techniques and Decoding Logic. Evolvable Hardware 2002: 60-62 - [c5]Channakeshav, Kuan Zhou, Jong-Ru Guo, Chao You, Bryan S. Goda, Russell P. Kraft, John F. McDonald:
Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques. FPL 2002: 414-423 - [c4]Kuan Zhou, Channakeshav, Michael Chu, Jong-Ru Guo, S.-C. Liu, Russell P. Kraft, Chao You, John F. McDonald:
Gigahertz SiGe BiCMOS FPGAs with new architectures and novel power management schemes. FPT 2002: 182-188 - 2001
- [c3]Bryan S. Goda, Russell P. Kraft, Steven R. Carlough, Thomas W. Krawczyk Jr., John F. McDonald:
Gigahertz Reconfigurable Computing Using SiGe HBT BiCMOS FPGAs. FPL 2001: 59-69 - 2000
- [j3]Steven R. Carlough, Robert A. Philhower, Cliff A. Maier, Sam A. Steidl, Pete M. Campbell, Atul Garg, Kyung-Suc Nah, Matthew W. Ernest, James R. Loy, Thomas W. Krawczyk Jr., Peter F. Curran, Russell P. Kraft, Hans J. Greub, John F. McDonald:
A 2-GHz clocked AlGaAs/GaAs HBT byte-slice datapath chip. IEEE J. Solid State Circuits 35(6): 885-894 (2000)
1990 – 1999
- 1999
- [j2]Atul Garg, Y. L. Le Coz, Hans J. Greub, R. B. Iverson, Robert F. Philhower, Pete M. Campbell, Cliff A. Maier, Sam A. Steidl, Matthew W. Ernest, Russell P. Kraft, Steven R. Carlough, J. W. Perry, Thomas W. Krawczyk Jr., John F. McDonald:
Accurate high-speed performance prediction for full differential current-mode logic: the effect of dielectric anisotropy. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(2): 212-219 (1999) - 1998
- [j1]Pete M. Campbell, Hans J. Greub, Atul Garg, Sam A. Steidl, Steven R. Carlough, Matthew W. Ernest, Robert F. Philhower, Cliff A. Maier, Russell P. Kraft, John F. McDonald:
A very wide bandwidth digital VCO using quadrature frequency multiplication and division implemented in AlGaAs/GaAs HBT's. IEEE Trans. Very Large Scale Integr. Syst. 6(1): 52-55 (1998)
1980 – 1989
- 1982
- [c2]Russell P. Kraft, John F. McDonald, J. Erkes:
Homomorphic signal dereverberation for a phased array imaging system. ICASSP 1982: 121-124
1970 – 1979
- 1979
- [c1]Russell P. Kraft, John F. McDonald, F. Ahlgren:
Minimax optimization of two-dimensional focused nonuniformly spaced arrays. ICASSP 1979: 286-289
Coauthor Index
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