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2010 – 2019
- 2010
[b1]Dafeng Zhou:
Circuit-level modelling and simulation of carbon nanotube devices. University of Southampton, UK, 2010
2000 – 2009
- 2009
- [c5]Tom J. Kazmierski, Dafeng Zhou, Bashir M. Al-Hashimi:
HSPICE implementation of a numerically efficient model of CNT transistor. FDL 2009: 1-5 - 2008
- [c4]Tom J. Kazmierski, Dafeng Zhou, Bashir M. Al-Hashimi:
Efficient circuit-level modelling of ballistic CNT using piecewise non-linear approximation of mobile charge density. DATE 2008: 146-151 - [c3]Dafeng Zhou, Tom J. Kazmierski, Bashir M. Al-Hashimi:
VHDL-AMS Implementation of a Numerical Ballistic CNT Model. FDL (Selected Papers) 2008: 87-100 - [c2]Dafeng Zhou, Tom J. Kazmierski, Bashir M. Al-Hashimi:
VHDL-AMS Implementation of a Numerical Ballistic CNT Model for Logic Circuit Simulation. FDL 2008: 94-98 - 2007
- [c1]Tom J. Kazmierski, Dafeng Zhou, Bashir M. Al-Hashimi:
A fast, numerical circuit-level model of carbon nanotube transistor. NANOARCH 2007: 33-37
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