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ORCIDChen Yang 0005
Person information
- affiliation: Xi'an Jiaotong University, School of Microelectronics, China
Other persons with the same name
- Chen Yang — disambiguation page
- Chen Yang 0001
![[0000-0002-7688-9278]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0002-7688-9278")
— Jilin University, College of Earth Sciences, Changchun, China (and 2 more) - Chen Yang 0002 — Beihang University, State Key Laboratory of Virtual Reality Technology and Systems, Beijing, China
- Chen Yang 0003 — Beijing Institute of Technology, Beijing Key Laboratory of Embedded Real-time Information Processing Technology, China
- Chen Yang 0004 — Texas A&M University, Department of Computer Science and Engineering, College Station, TX, USA
- Chen Yang 0006 — Wuhan University, School of Urban Design, China
- Chen Yang 0007 — IBO Technology (Shenzhen) Co., Ltd, China (and 2 more)
- Chen Yang 0008 — Shenzhen University, College of Management, China
- Chen Yang 0009 — Tsinghua University, China National Clearing Center, Department of Computer Science and Technology, Beijing, China (and 1 more)
- Chen Yang 0010 — Boston University, Department of Electrical and Computer Engineering, MA, USA
- Chen Yang 0011 — Beijing Institute of Technology, School of Computer Science and Technology, China (and 3 more)
- Chen Yang 0012 — Wuhan University, Economics and Management School, China (and 1 more)
- Chen Yang 0013 — Shanxi University, Business College,Basic Course Department, Taiyuan, China
- Chen Yang 0014 — Harbin Institute of Technology, School of Mechatronics Engineering, China
- Chen Yang 0015 — Huazhong University of Science and Technology, School of Artificial Intelligence and Automation, Wuhan, China
- Chen Yang 0016 — Guizhou University, College of Big Data and Information Engineering, Guiyang, China (and 3 more)
- Chen Yang 0017 — Southeast University, School of Electrical Engineering, Nanjing, China
- Chen Yang 0018 — Beijing University of Posts and Telecommunications, School of Electronic Engineering, China (and 1 more)
- Chen Yang 0019 — Chinese Academy of Sciences, Suzhou Institute of Biomedical Engineering and Technology, China (and 1 more)
- Chen Yang 0020 — Xidian University, School of Artificial Intelligence, Xi'an, China
- Chen Yang 0021 — China Academy of Space Technology, Qian Xuesen Laboratory of Space Technology, Beijing, China (and 1 more)
- Chen Yang 0022 — Ghent University, Department of Food Technology, Safety, and Health, Belgium
- Chen Yang 0023 — Shanghai Jiao Tong University, China
- Chen Yang 0024 — Beihang University, School of Computer Science and Engineering, Beijing, China
- Chen Yang 0025 — Hong Kong University of Science and Technology, Hong Kong
- Chen Yang 0026 — City University of Hong Kong, Department of Electrical Engineering, Hong Kong
- Chen Yang 0027 — Xidian University, Key Laboratory of Intelligent Perception and Image Understanding of Ministry of Education, School of Artificial Intelligence, Xi'an, China
Other persons with a similar name
- Chung Yang Chen (aka: Chung-Yang Chen)
- Yang Chen — disambiguation page
- YangQuan Chen (aka: Yangquan Chen, Yang Quan Chen, Yang-Quan Chen) — University of California, Merced, School of Engineering, CA, USA (and 2 more)
- Chaoyang Chen 0001 (aka: Chao-Yang Chen 0001) — Hunan University of Science and Technology, School of Information and Electrical Engineering, Xiangtan, China (and 3 more)
- Yang Chen 0001 — Fudan University, School of Computer Science, China (and 3 more)
- Yang-Yang Chen 0001 (aka: Yangyang Chen 0001) — Southeast University, School of Automation and Key Laboratory of Measurement and Control of Complex Systems of Engineering, Ministry of Education, Nanjing, Jiangsu, China
- Yang Chen 0008 — Southeast University, Laboratory of Image Science and Technology, Nanjing, China (and 2 more)
- Chen-Yang Cheng
- Chen-Wei Yang
- Chou Chen Yang
- show all similar names
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2020 – today
- 2024
[j27]Zichu Liu, Jia Hou, Jianfei Wang, Chen Yang:
A Novel Two-Level Protection Scheme against Hardware Trojans on a Reconfigurable CNN Accelerator. Cryptogr. 8(3): 34 (2024)- [j26]Chen Yang, Yaoyao Yang, Yishuo Meng, Kaibo Huo, Siwei Xiang, Jianfei Wang, Li Geng:
Flexible and Efficient Convolutional Acceleration on Unified Hardware Using the Two-Stage Splitting Method and Layer-Adaptive Allocation of 1-D/2-D Winograd Units. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 919-932 (2024) - [j25]Jianfei Wang, Chen Yang, Fahong Zhang, Yishuo Meng, Siwei Xiang, Yang Su:
A High-Throughput Toom-Cook-4 Polynomial Multiplier for Lattice-Based Cryptography Using a Novel Winograd-Schoolbook Algorithm. IEEE Trans. Circuits Syst. I Regul. Pap. 71(1): 359-372 (2024) - [j24]Wenzheng He, Zikuo Lu, Xin Liu, Ziwei Xu, Jingshuo Zhang, Chen Yang, Li Geng:
A Real-Time and High Precision Hardware Implementation of RANSAC Algorithm for Visual SLAM Achieving Mismatched Feature Point Pair Elimination. IEEE Trans. Circuits Syst. I Regul. Pap. 71(11): 5102-5114 (2024) - [j23]Jianfei Wang, Chen Yang, Fahong Zhang, Jia Hou, Yishuo Meng, Siwei Xiang, Yang Su:
A High-Throughput and Scalable Schoolbook Polynomial Multiplier for Accelerating Saber on FPGA Using a Novel Winograd-Based Architecture. IEEE Trans. Circuits Syst. II Express Briefs 71(4): 2344-2348 (2024) - [j22]Yishuo Meng, Siwei Xiang, Jianfei Wang, Jia Hou, Chen Yang:
ALSCA: A Large-Scale Sparse CNN Accelerator Using Position-First Dataflow and Input Channel Merging Approach. IEEE Trans. Circuits Syst. II Express Briefs 71(7): 3473-3477 (2024) - [j21]Fahong Zhang, Chen Yang, Rui Zong, Xinran Zheng, Jianfei Wang, Yishuo Meng:
An Efficient and Scalable FHE-Based PDQ Scheme: Utilizing FFT to Design a Low Multiplication Depth Large-Integer Comparison Algorithm. IEEE Trans. Inf. Forensics Secur. 19: 2258-2272 (2024) - [j20]Chen Yang, Yishuo Meng, Jiawei Xi, Siwei Xiang, Jianfei Wang, Kuizhi Mei:
WRA-SS: A High-Performance Accelerator Integrating Winograd With Structured Sparsity for Convolutional Neural Networks. IEEE Trans. Very Large Scale Integr. Syst. 32(1): 164-177 (2024) - 2023
- [j19]Jia Hou, Jingyu Zhang, Qi Chen, Siwei Xiang, Yishuo Meng, Jianfei Wang, Cimang Lu, Chen Yang:
POSS-CNN: An Automatically Generated Convolutional Neural Network with Precision and Operation Separable Structure Aiming at Target Recognition and Detection. Inf. 14(11): 604 (2023) - [j18]Chen Yang, Kaibo Huo, Long-Fei Geng, Kuizhi Mei:
DRGN: a dynamically reconfigurable accelerator for graph neural networks. J. Ambient Intell. Humaniz. Comput. 14(7): 8985-9000 (2023) - [j17]Yifan Gong, Jinshuo Zhang, Xin Liu, Jialin Li, Ying Lei, Zhe Zhang, Chen Yang, Li Geng:
A Real-Time and Efficient Optical Flow Tracking Accelerator on FPGA Platform. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 4914-4927 (2023) - [j16]Jianfei Wang, Chen Yang, Fahong Zhang, Yishuo Meng, Yang Su:
TCPM: A Reconfigurable and Efficient Toom-Cook-Based Polynomial Multiplier Over Rings Using a Novel Compressed Postprocessing Algorithm. IEEE Trans. Very Large Scale Integr. Syst. 31(8): 1153-1166 (2023) - [j15]Chen Yang, Junfeng Wu, Siwei Xiang, Liyan Liang, Li Geng:
A High-Throughput and Flexible Architecture Based on a Reconfigurable Mixed-Radix FFT With Twiddle Factor Compression and Conflict-Free Access. IEEE Trans. Very Large Scale Integr. Syst. 31(10): 1472-1485 (2023) - [j14]Yishuo Meng, Chen Yang, Siwei Xiang, Jianfei Wang, Kuizhi Mei, Li Geng:
An Efficient CNN Accelerator Achieving High PE Utilization Using a Dense-/Sparse-Aware Redundancy Reduction Method and Data-Index Decoupling Workflow. IEEE Trans. Very Large Scale Integr. Syst. 31(10): 1537-1550 (2023) - [c9]Yuheng Xia, Yishuo Meng, Siwei Xiang, Jianfei Wang, Chen Yang:
An Efficient Hardware Implementation of Dilated Convolution Using a Novel Channel-Equivalent Decomposition Method. ICTA 2023: 172-173 - 2022
- [j13]Chen Yang, Qi Chen, Yaoyao Yang, Jingyu Zhang, Minshun Wu, Kuizhi Mei:
SDF-SLAM: A Deep Learning Based Highly Accurate SLAM Using Monocular Camera Aiming at Indoor Map Reconstruction With Semantic and Depth Fusion. IEEE Access 10: 10259-10272 (2022) - [j12]Chen Yang, Jia Hou, Yizhou Wang, Haibo Zhang, Xiaoli Wang, Li Geng:
RNA: A Flexible and Efficient Accelerator Based on Dynamically Reconfigurable Computing for Multiple Convolutional Neural Networks. J. Circuits Syst. Comput. 31(16): 2250289:1-2250289:32 (2022) - [j11]Yang Su, Bai-Long Yang, Chen Yang, Songyin Zhao:
ReMCA: A Reconfigurable Multi-Core Architecture for Full RNS Variant of BFV Homomorphic Evaluation. IEEE Trans. Circuits Syst. I Regul. Pap. 69(7): 2857-2870 (2022) - [j10]Yang Su, Bai-Long Yang, Chen Yang, Zepeng Yang, Yi-Wei Liu:
A Highly Unified Reconfigurable Multicore Architecture to Speed Up NTT/INTT for Homomorphic Polynomial Multiplication. IEEE Trans. Very Large Scale Integr. Syst. 30(8): 993-1006 (2022) - [j9]Chen Yang, Yishuo Meng, Kaibo Huo, Jiawei Xi, Kuizhi Mei:
A Sparse CNN Accelerator for Eliminating Redundant Computations in Intra- and Inter-Convolutional/Pooling Layers. IEEE Trans. Very Large Scale Integr. Syst. 30(12): 1902-1915 (2022) - [c8]Jialin Li, Liangji Zhang, Xuewei Shen, Yifan Gong, Ying Lei, Chen Yang, Li Geng:
A Hardware Architecture of Feature Extraction for Real-Time Visual SLAM. IECON 2022: 1-6 - 2021
- [j8]Chen Yang, Jingyu Zhang, Qi Chen, Yi Xu, Cimang Lu:
UL-CNN: An Ultra-Lightweight Convolutional Neural Network Aiming at Flash-Based Computing-In-Memory Architecture for Pedestrian Recognition. J. Circuits Syst. Comput. 30(2): 2150022:1-2150022:22 (2021) - [c7]Chen Yang, Zepeng Yang, Jia Hou, Yang Su:
A Lightweight Full Homomorphic Encryption Scheme on Fully-connected Layer for CNN Hardware Accelerator achieving Security Inference. ICECS 2021: 1-4 - 2020
- [j7]Yang Su, Bailong Yang, Chen Yang, Luogeng Tian:
FPGA-Based Hardware Accelerator for Leveled Ring-LWE Fully Homomorphic Encryption. IEEE Access 8: 168008-168025 (2020) - [j6]Chen Yang, Yizhou Wang, Xiaoli Wang, Li Geng:
A Stride-Based Convolution Decomposition Method to Stretch CNN Acceleration Algorithms for Efficient and Flexible Hardware Implementation. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(9): 3007-3020 (2020) - [c6]Chen Yang, Jia Hou, Yizhou Wang, Li Geng:
CRP: Context-directed Replacement Policy to Improve Cache Performance for Coarse-Grained Reconfigurable Arrays. ICECS 2020: 1-2
2010 – 2019
- 2019
- [j5]Chen Yang, Yizhou Wang, Xiaoli Wang, Li Geng:
WRA: A 2.2-to-6.3 TOPS Highly Unified Dynamically Reconfigurable Accelerator Using a Novel Winograd Decomposition Algorithm for Convolutional Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3480-3493 (2019) - [c5]Chen Yang, Jia Hou, Yizhou Wang, Qi Zhou, Li Geng:
CCP: Configuration Context based Prefetching to Improve Coarse-Grained Reconfigurable Array Performance. ICECS 2019: 107-108 - [c4]Chen Yang, Bowen Li, Yizhou Wang:
A Fully Quantitative Scheme With Fine-grained Tuning Method For Lightweight CNN Acceleration. ICECS 2019: 125-126 - 2018
- [j4]Leibo Liu, Chen Yang, Shouyi Yin, Shaojun Wei:
CDPM: Context-Directed Pattern Matching Prefetching to Improve Coarse-Grained Reconfigurable Array Performance. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(6): 1171-1184 (2018) - [j3]Leibo Liu, Zhaoshi Li, Chen Yang, Chenchen Deng, Shouyi Yin, Shaojun Wei:
HReA: An Energy-Efficient Embedded Dynamically Reconfigurable Fabric for 13-Dwarfs Processing. IEEE Trans. Circuits Syst. II Express Briefs 65-II(3): 381-385 (2018) - 2017
- [j2]Chen Yang, Leibo Liu, Kai Luo, Shouyi Yin, Shaojun Wei:
CIACP: A Correlation- and Iteration- Aware Cache Partitioning Mechanism to Improve Performance of Multiple Coarse-Grained Reconfigurable Arrays. IEEE Trans. Parallel Distributed Syst. 28(1): 29-43 (2017) - 2016
- [c3]Chen Yang, Leibo Liu, Shouyi Yin, Shaojun Wei:
Data cache prefetching via context directed pattern matching for coarse-grained reconfigurable arrays. DAC 2016: 64:1-64:6 - 2015
- [j1]Chen Yang, Leibo Liu, Yansheng Wang, Shouyi Yin, Peng Cao, Shaojun Wei:
Configuration Approaches to Enhance Computing Efficiency of Coarse-Grained Reconfigurable Array. J. Circuits Syst. Comput. 24(3): 1550043:1-1550043:21 (2015) - [c2]Chen Yang, Leibo Liu, Shouyi Yin, Shaojun Wei:
Cost-Effective Memory Architecture to Achieve Flexible Configuration and Efficient Data Transmission for Coarse-Grained Reconfigurable Array (Abstract Only). FPGA 2015: 263 - 2014
- [c1]Chen Yang, Leibo Liu, Yansheng Wang, Shouyi Yin, Peng Cao, Shaojun Wei:
Configuration approaches to improve computing efficiency of coarse-grained reconfigurable multimedia processor. FPL 2014: 1-4
Coauthor Index
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