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• 
  Dana Richards:
  On a "Counter - Example". 2-3
• 
  Peter J. Denning:
  Why not innovations in computer architecture? 4-7
• 
  George W. Gerrity:
  Hardware detection of undefined references. 8-11
• 
  Peter J. Denning, T. Don Dennis:
  On minimizing contention at semaphores. 12-19

Currently Not Available

• 
  Ken Aupperle:
  A real innovation in computer architecture. 6-7
• 
  John R. Galloway:
  Architectural innovation round: round #3. 8-10
• 
  John A. Sharp:
  Some thoughts on data flow architectures. 11-21
• 
  Mary Payne, Dileep Bhandarkar:
  VAX floating point: a solid foundation for numerical computation. 22-33
• 
  Lloyd Dickman:
  Treasurer's report. 37-38

• 
  Current literature: abstracts of articles of interest... 48

• 
  Julian Davies:
  Clock architecture and management. 3-6
• 
  Gerhard Chroust, Jörg R. Mühlbacher:
  Rivalling multiprocessor organization: a hardware/speed trade-off. 7-10
• 
  David K. Stevenson:
  A report on the proposed IEEE Floating Point Standard (IEEE task p754). 11-12

• 
  Justin R. Rattner, George W. Cox:
  Object-based computer architecture. 4-11
• 
  Glenford J. Myers, B. R. S. Buckingham:
  A hardware implementation of capability-based addressing. 12-24
• 
  David A. Patterson, David R. Ditzel:
  The case for the reduced instruction set computer. 25-33
• 
  Douglas W. Clark, William D. Strecker:
  Comments on "the case for the reduced instruction set computer, " by Patterson and Ditzel. 34-38
• 
  James C. Brakefield:
  Is 32 bits of address too much? 39-40
• 
  James C. Brakefield:
  The peripheral bus. 41-43

• 
  Trevor N. Mudge:
  Review of The structure of computers and computation Vol. I by David J. Kuck. John Wiley & and Sons 1978. 44-45

• 
  Current literature: abstracts of articles of interest... 46

• 
  Karl Reed:
  The way forward in computer architecture research. 3-7
• 
  John Gilmore:
  Suggested enhancements to the Motorola MC68000. 8-14
• 
  John F. Wakerly:
  Pascal extensions for describing computer instruction sets. 15-23
• 
  Krishna M. Kavi:
  Semantics of an algorithm. 24-26
• 
  Philip C. Treleaven:
  VLSI: machine architecture and very high level languages. 27-38

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 last updated on 2025-04-11 18:18 CEST by the dblp team

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