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ORCID28th RSP 2017: Seoul, South Korea
- Sungjoo Yoo, Fabiano Hessel, Frédéric Rousseau, Kenneth B. Kent, Kyoungwoo Lee:
International Symposium on Rapid System Prototyping, RSP 2017, Shortening the Path from Specification to Prototype, October 19-20, 2017, Seoul, South Korea. ACM 2017, ISBN 978-1-4503-5418-9 - Saideep Tiku
, Sudeep Pasricha:
Energy-efficient and robust middleware prototyping for smart mobile computing. 2-8 - Michael Witterauf, Frank Hannig, Jürgen Teich:
Constructing fast and cycle-accurate simulators for configurable accelerators using C++ templates. 9-15 - Arief Wicaksana, Alban Bourge, Olivier Muller, Arif Sasongko, Frédéric Rousseau:
Prototyping dynamic task migration on heterogeneous reconfigurable systems. 16-22 - Tiago Mück, Bryan Donyanavard, Nikil D. Dutt:
PoIiCym: rapid prototyping of resource management policies for HMPs. 23-29 - Wooseok Yi, Junki Park, Jae-Joon Kim:
GeCo: classification restricted Boltzmann machine hardware for on-chip learning. 30-35 - Sean Seeley, Vidya Sankaranaryanan, Zack Deveau, Panagiotis Patros, Kenneth B. Kent:
Simulation-based circuit-activity estimation for FPGAs containing hard blocks. 36-42 - Maha Kooli, Henri-Pierre Charles, Clément Touzet, Bastien Giraud, Jean-Philippe Noël:
Software platform dedicated for in-memory computing circuit evaluation. 43-49 - Jeonggyu Jang, Hoeseok Yang:
Executable dataflow benchmark generation technique for multi-core embedded systems. 50-56 - Péter Völgyesi, Abhishek Dubey, Timothy Krentz, István Madari, Mary Metelko, Gabor Karsai:
Time synchronization services for low-cost fog computing applications. 57-63 - Imane Hafnaoui, Chao Chen, Rabeh Ayari, Gabriela Nicolescu, Giovanni Beltrame:
An analysis of random cache effects on real-time multi-core scheduling algorithms. 64-70 - Minato Yokota, Kaoru Saso, Yuko Hara-Azumi:
One-instruction set computer-based multicore processors for energy-efficient streaming data processing. 71-77 - Daniel Mueller-Gritschneder, Keerthikumara Devarajegowda, Martin Dittrich, Wolfgang Ecker, Marc Greim, Ulf Schlichtmann:
The extendable translating instruction set simulator (ETISS) interlinked with an MDA framework for fast RISC prototyping. 79-84 - Gyeongmin Lee, Seonyeong Heo, Bongjun Kim, Jong Kim, Hanjun Kim:
Rapid prototyping of IoT applications with Esperanto compiler. 85-91 - Naoya Ito, Yuuki Oosako, Nagisa Ishiura, Hiroyuki Kanbara, Hiroyuki Tomiyama:
Binary synthesis implementing external interrupt handler as independent module. 92-98 - Miho Shimizu, Nagisa Ishiura, Sayuri Ota, Wakako Nakano:
Speculative execution in distributed controllers for high-level synthesis. 99-104
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