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ORCID11th ReCoSoC 2016: Tallinn, Estonia
- 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2016, Tallinn, Estonia, June 27-29, 2016. IEEE 2016, ISBN 978-1-5090-2520-6
- Miltos D. Grammatikakis
, Kyprianos Papadimitriou, Polydoros Petrakis, Marcello Coppola, Michael Soulie:
Address interleaving for low-cost NoCs. 1-8 - Manuel Selva, Abdoulaye Gamatié, David Novo, Gilles Sassatelli:
Speed and accuracy dilemma in NoC simulation: What about memory impact? 1-7 - Tripti Jain, Klaus Schneider, Anoop Bhagyanath:
The selector-tree network: A new self-routing and non-blocking interconnection network. 1-8 - Luca Pezzarossa, Martin Schoeberl, Jens Sparsø:
Reconfiguration in FPGA-based multi-core platforms for hard real-time applications. 1-8 - Dirk Stroobandt, Ana Lucia Varbanescu, Catalin Bogdan Ciobanu, Muhammed Al Kadi, Andreas Brokalakis, George Charitopoulos, Tim Todman, Xinyu Niu, Dionisios N. Pnevmatikatos, Amit Kulkarni, Elias Vansteenkiste, Wayne Luk, Marco D. Santambrogio, Donatella Sciuto, Michael Hübner, Tobias Becker, Georgi Gaydadjiev, Antonis Nikitakis, Alex J. W. Thom:
EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures. 1-7 - David Andrews, Marco Platzner:
Programming models for reconfigurable manycore systems. 1-8 - Johanna Sepúlveda, Daniel Florez, Ramon Fernandes, César A. M. Marcon, Guy Gogniat, Georg Sigl:
Towards risk aware NoCs for data protection in MPSoCs. 1-8 - Teng Xu, Hongxiang Gu, Miodrag Potkonjak:
An ultra-low energy PUF matching security platform using programmable delay lines. 1-8 - Maria Mendez Real, Philipp Wehner, Vincent Migliore, Vianney Lapotre, Diana Göhringer, Guy Gogniat:
Dynamic spatially isolated secure zones for NoC-based many-core accelerators. 1-6 - Muhammad Rashid, Malik Imran, Atif Raza Jafri:
Comparative analysis of flexible cryptographic implementations. 1-6 - George Tsamis, Stamatios Kavvadias, Antonis Papagrigoriou, Miltos D. Grammatikakis, Kyprianos Papadimitriou:
Efficient bandwidth regulation at memory controller for mixed criticality applications. 1-8 - Siavoosh Payandeh Azad, Behrad Niazmand, Peeter Ellervee, Jaan Raik, Gert Jervan, Thomas Hollstein:
SoCDep2: A framework for dependable task deployment on many-core systems under mixed-criticality constraints. 1-6 - Othon Tomoutzoglou, Dimitrios Bakoyiannis, George Komaros, Marcello Coppola:
Efficient communication in heterogeneous SoCs with unified address space. 1-6 - Poona Bahrebar, Dirk Stroobandt:
Online reconfigurable routing method for handling link failures in NoC-based MPSoCs. 1-8 - Elham Kashefi, Hamid R. Zarandi, Ann Gordon-Ross:
Postponing wearout failures in chip multiprocessors using thermal management and thread migration. 1-7 - Luca Sterpone, Luca Boragno, David Merodio Codinachs:
Analysis of radiation-induced SEUs on dynamic reconfigurable systems. 1-6 - Jan Moritz Joseph, Sven Wrieden, Christopher Blochwitz, Alberto García Ortiz, Thilo Pionteck:
A simulation environment for design space exploration for asymmetric 3D-Network-on-Chip. 1-8 - Wolfgang Büter, Dominic Oehlert, Alberto García Ortiz:
ERRCA: A buffer-efficient reconfigurable optical Network-on-Chip with permanent-error recognition. 1-6 - Tobias Wiersema, Marco Platzner:
Verifying worst-case completion times for reconfigurable hardware modules using proof-carrying hardware. 1-8 - William L. Harrison, Ian Graves, Adam M. Procter, Michela Becchi, Gerard Allwein:
A programming model for reconfigurable computing based in functional concurrency. 1-8 - Ayad Dalloo, Alberto García Ortiz:
A programmable and reconfigurable core for binary image processing. 1-6
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