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ORCIDCICC 2020: Boston, MA, USA
- 2020 IEEE Custom Integrated Circuits Conference, CICC 2020, Boston, MA, USA, March 22-25, 2020. IEEE 2020, ISBN 978-1-7281-6031-3
- Sungju Ryu, Hyungjun Kim, Wooseok Yi, Jongeun Koo, Eunhwan Kim
, Yulhwa Kim, Taesu Kim, Jae-Joon Kim:
A 44.1TOPS/W Precision-Scalable Accelerator for Quantized Neural Networks in 28nm CMOS. 1-4 - Sungsik Park, Yunhong Kim, Woojun Choi, Yong-Tae Lee, Sungbeen Kim, Youngmin Shin, Youngcheol Chae:
A DTMOST-based Temperature Sensor with 3σ Inaccuracy of ±0.9°C for Self-Refresh Control in 28nm Mobile DRAM. 1-4 - Assim Boukhayma, Antonino Caizzone, Raffaele Capoccia, Christian C. Enz:
Design and Optimization of Low Power and Low Light Sensor: (Invited). 1-8 - Kunyang Liu, Hongliang Pu, Hirofumi Shinohara:
A 0.5-V 2.07-fJ/b 497-F2 EE/CMOS Hybrid SRAM Physically Unclonable Function with < 1E-7 Bit Error Rate Achieved through Hot Carrier Injection Burn-in. 1-4 - Liang Fang, Ping Gui:
A 13nV/✓Hz 4.5μW Chopper Instrumentation Amplifier with Robust Ripple Reduction and Input Impedance Boosting Techniques. 1-5 - Ckristian Duran, Megan Wachs, Luis E. Rueda G., Albert Huntington, Javier Ardila, Jack Kang, Andres Amaya, Héctor Gómez, Juan Romero, Laude Fernandez, Felipe Flechas, Rolando Torres, Juan Sebastian Moya, Wilmer Ramirez, Julian Arenas, Juan Gomez, Hanssel Morales, Camilo Rojas, Alex Mantilla, Elkim Roa, Krste Asanovic:
An Energy-Efficient RISC-V RV32IMAC Microcontroller for Periodical-Driven Sensing Applications. 1-4 - Alexander S. Delke, Anne-Johan Annema, Mark S. Oude Alink, Yanyu Jin, Jos Verlinden, Bram Nauta:
A Colpitts-Based Frequency Reference Achieving a Single-Trim ± 120ppm Accuracy from -50 to 170°C. 1-4 - Shuo Li, Benton H. Calhoun:
Sub-microAmp Energy Harvesting and Power Management Units for Self-Powered IoT SoCs: Analog vs. Digital Implementations. 1-8 - Chen Chen, Jin Liu, Hoi Lee:
A 9 - 45V Input 2MHz 3-Switch ZVS Step-up / -down Hybrid Converter with 5x Volume Reduction. 1-4 - Ian Costanzo, Devdip Sen, Ulkuhan Guler:
An Integrated Readout Circuit for a Transcutaneous Oxygen Sensing Wearable Device. 1-4 - Jeroen P. G. van Dijk, Pascal 't Hart, Gerd Kiene, Ramon Overwater, Pinakin Padalia, Job van Staveren, Masoud Babaie, Andrei Vladimirescu, Edoardo Charbon, Fabio Sebastiano:
Cryo-CMOS for Analog/Mixed-Signal Circuits and Systems. 1-8 - Chengshuo Yu, Taegeun Yoo, Tony Tae-Hyoung Kim, Kevin Tshun Chuan Chai, Bongjin Kim:
A 16K Current-Based 8T SRAM Compute-In-Memory Macro with Decoupled Read/Write and 1-5bit Column ADC. 1-4 - Xiaoyang Wang, Patrick P. Mercier:
An 11.1nJ-Start-up 16/20MHz Crystal Oscillator with Multi-Path Feedforward Negative Resistance Boosting and Optional Dynamic Pulse Width Injection. 1-4 - Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.0285mm2 0.68pJ/bit Single-Loop Full-Rate Bang-Bang CDR without Reference and Separate Frequency Detector Achieving an 8.2(Gb/s)/µs Acquisition Speed of PAM-4 data in 28nm CMOS. 1-4 - Nilanjan Pal, Adam Fish, William McIntyre, Nathanael Griesert, Greg Winter, Travis Eichhorn, Robert C. N. Pilawa-Podgurski, Pavan Kumar Hanumolu:
A 91% efficient 30V hybrid boost-SC converter based backlight LED driver in 180nm CMOS. 1-4 - Shimeng Yu, Xiaoyu Sun, Xiaochen Peng, Shanshi Huang:
Compute-in-Memory with Emerging Nonvolatile-Memories: Challenges and Prospects. 1-4 - Jordan Thimot, Kukjoo Kim, Chen Shi, Kenneth L. Shepard:
A 27-Mbps, 0.08-mm3 CMOS Transceiver with Simultaneous Near-field Power Transmission and Data Telemetry for Implantable Systems. 1-4 - Debayan Das, Josef Danial, Anupam Golder, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
Deep Learning Side-Channel Attack Resilient AES-256 using Current Domain Signature Attenuation in 65nm CMOS. 1-4 - Andrew Townley, Nima Baniasadi, Sashank Krishnamurthy, Constantine Sideris, Ali Hajimiri, Elad Alon, Ali M. Niknejad:
A Fully Integrated, Dual Channel, Flip Chip Packaged 113 GHz Transceiver in 28nm CMOS supporting an 80 Gb/s Wireless Link. 1-4 - Haoyu Zhuang, Jiaxin Liu, Nan Sun:
A Fully-Dynamic Time-Interleaved Noise-Shaping SAR ADC Based on CIFF Architecture. 1-4 - Zhiyuan Zhou, Nghia Tang, Bai Noi Nguyen, Wookpyo Hong, Partha Pratim Pande, Deukhyoun Heo:
A Wide Output Voltage Range Single-Input-Multi-Output Hybrid DC-DC Converter Achieving 87.5% Peak Efficiency With a Fast Response Time and Low Cross Regulation for DVFS Applications. 1-4 - Qing Li, Czang-Ho Lee, William S. Wong, Manoj Sachdev:
Realization of an Energy-Efficient, Full-Swing Decoder with Unipolar TFT Technology. 1-4 - Kenichi Okada, Jian Pang:
Millimeter-Wave CMOS Phased-Array Transceiver Supporting Dual-Polarized MIMO for 5G NR. 1-8 - Sally Safwat Amin, Patrick P. Mercier:
H-SIMO: A Hybrid Single-Inductor Multi-Output 5-Level Thin-Oxide Power Management Unit Achieving 91.4% Efficiency from Li-ion Battery Voltages in 28nm FD-SOI. 1-4 - Amr Ahmed, Min-Yu Huang, Hua Wang:
Mixer-First Extremely Wideband 43-97 GHz RX Frontend with Broadband Quadrature Input Matching and Current Mode Transformer-Based Image Rejection for Massive MIMO Applications. 1-4 - Bo Xiang, Yongping Fan, James S. Ayers, James Shen, Dan Zhang:
A 0.5V-to-0.9V 0.2GHz-to-5GHz Ultra-Low-Power Digitally-Assisted Analog Ring PLL with Less Than 200ns Lock Time in 22nm FinFET CMOS Technology. 1-4 - Ping-Hung Yin, Chih-Wen Lu, Jia-Shyang Wang, Keng-Li Chang, Fu-Kuo Lin, Chia-Jung Chang, Gen-Chiuan Bai:
A 368 × 184 Optical Under-Display Fingerprint Sensor With Global Shutter and High-Dynamic-Range Operation. 1-4 - Sukjin Kim, Radhakrishnan Sithanandam, Woojin Seo, Mijin Lee, Sangyoung Cho, Juho Park, Hyukhoon Kwon, Namho Kim, Chanhee Jeon:
Technology Scaling of ESD Devices in State of the Art FinFET Technologies. 1-6 - Zhehong Wang, Tianjun Zhang, Daichi Fujiki, Arun Subramaniyan, Xiao Wu, Makoto Yasuda, Satoru Miyoshi, Masaru Kawaminami, Reetuparna Das, Satish Narayanasamy, David T. Blaauw:
A 2.46M reads/s Genome Sequencing Accelerator using a 625 Processing-Element Array. 1-4 - Hyung-Jin Lee, Ravi Mahajan, Farhana Sheikh, Ramune Nagisetty, Manish Deo:
Multi-die Integration Using Advanced Packaging Technologies. 1-7 - Jan S. Rentmeister, Jason T. Stauth:
A 92.4% Efficient, 5.5V: 0.4-1.2V, FCML Converter with Modified Ripple Injection Control for Fast Transient Response and Capacitor Balancing. 1-4 - Mahabubul Alam, Abdullah Ash-Saki, Swaroop Ghosh:
Design-Space Exploration of Quantum Approximate Optimization Algorithm under Noise. 1-4 - You Li, Meng Miao, Robert Gauthier:
ESD Protection Design Overview in Advanced SOI and Bulk FinFET Technologies. 1-4 - Chen-Kai Hsu, Xiyuan Tang, Wenda Zhao, Rui Xu, Abhishek Mukherjee, Timothy R. Andeen, Nan Sun:
A 77.1-dB 6.25-MHz-BW Pipeline SAR ADC with Enhanced Interstage Gain Error Shaping and Quantization Error Shaping. 1-4 - Zhiwei Zong, Xinyan Tang, Johan Nguyen, Khaled Khalaf, Giovanni Mangraviti, Yao Liu, Piet Wambacq:
A 28GHz Two-Way Current Combining Stacked-FET Power Amplifier in 22nm FD-SOI. 1-4 - Anjana Dissanayake, Jesse Moody, Henry L. Bishop, Daniel S. Truesdell, Henry Muhlbauer, Ruochen Lu, Anming Gao, Songbin Gong, Benton H. Calhoun, Steven M. Bowers:
A- 108dBm Sensitivity, -28dB SIR, 130nW to 41µW, Digitally Reconfigurable Bit-Level Duty-Cycled Wakeup and Data Receiver. 1-4 - Marco Fattori, C. A. Mendes Da Costa, Joost A. Fijn, Enrico Genco, Pieter Harpe, Eugenio Cantatore, M. Charbonneau:
A Fully-Printed Organic Smart Temperature Sensor for Cold Chain Monitoring Applications. 1-4 - Amir Hossein Masnadi Shirazi, Mohammad Mahani, Hossein Miri Lavasani, Shahriar Mirabbasi, Sudip Shekhar, Rod Zavari, Hormoz Djahanshahi:
A Compact Dual-Core 26.1-to-29.9GHz Coupled-CMOS LC-VCO with Implicit Common-Mode Resonance and FoM of-191 dBc/Hz at 10MHz. 1-4 - Yijie Wei, Qiankai Cao, Jie Gu, Kofi Otseidu, Levi J. Hargrove:
A Fully-integrated Gesture and Gait Processing SoC for Rehabilitation with ADC-less Mixed-signal Feature Extraction and Deep Neural Network for Classification and Online Training. 1-4 - Roy H. Olsson III, Zichen Tang, Michael J. D'Agati:
Doping of Aluminum Nitride and the Impact on Thin Film Piezoelectric and Ferroelectric Device Performance. 1-6 - Arian Hashemi Talkhooncheh, You Yu, Abhinav Agarwal, William Wei-Ting Kuo, Kuan-Chang Xavier Chen, Minwo Wang, Gudrun Hoskuldsdottir, Wei Gao, Azita Emami:
A Fully-Integrated Biofuel-Cell-Based Energy Harvester with 86% Peak Efficiency and 0.25V Minimum Input Voltage Using Source-Adaptive MPPT. 1-4 - Paolo Mantovani, Robert Margelli, Davide Giri, Luca P. Carloni:
HL5: A 32-bit RISC-V Processor Designed with High-Level Synthesis. 1-8 - Hyung-Jin Lee, Steven Callender, Said Rami, Woorim Shin, Qiang Yu, Jose Mauricio Marulanda:
Intel 22nm Low-Power FinFET (22FFL) Process Technology for 5G and Beyond. 1-7 - Baibhab Chatterjee, Shreyas Sen:
A 41.5 pJ/b, 2.4GHz Digital-Friendly Orthogonally Tunable Transceiver SoC with 3-decades of Energy-Performance Scalability. 1-5 - Pedram Payandehnia, Tao He, Yanchao Wang, Gabor C. Temes:
Digital Correction of DAC Nonlinearity in Multi-Bit Feedback A/D Converters: Invited tutorial. 1-8 - Alexander Petrie, Whitney Kinnison, Yixin Song, Shiuh-Hua Wood Chiang, Kent D. Layton:
A 0.2-V 10-bit 5-kHz SAR ADC with Dynamic Bulk Biasing and Ultra-Low-Supply-Voltage Comparator. 1-4 - Nael Mizanur Rahman, Edward Lee, Venkata Chaitanya Krishna Chekuri, Arvind Singh, Saibal Mukhopadhyay:
A Configurable Dual-Mode PRINCE Cipher with Security Aware Pipelining in 65nm for High Throughput Applications. 1-4 - Taehoon Jeong, Anantha P. Chandrakasan, Hae-Seung Lee:
S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance. 1-4 - Armin Tajalli, Mani Bastani Parizi, Dario Albino Carnelli, Chen Cao, Kiarash Gharibdoust, Amit Gupta, Ahmed Hassanin, Klaas L. Hofstra, Brian Holden, Ali Hormati, John Keay, Amin Shokrollahi, David Stauffer, Richard Simpson, Andrew Stewart, Giuseppe Surace, Omid Talebi Amiri, Anton Tschank, Roger Ulrich, Christoph Walter, Anant Singh:
Short-Reach and Pin-Efficient Interfaces Using Correlated NRZ. 1-8 - Martin Kinyua, Eric G. Soenen:
A 72.6 dB SNDR 14b 100 MSPS Ring Amplifier Based Pipelined SAR ADC with Dynamic Deadzone Control in 16 nm CMOS. 1-4 - Gicheol Shin, Eunyoung Lee, Jongmin Lee, Yongmin Lee, Yoonmyung Lee:
A Static Contention-Free Differential Flip-Flop in 28nm for Low-Voltage, Low-Power Applications. 1-4 - Hassan Dbouk, Sujan K. Gonugondla, Charbel Sakr, Naresh R. Shanbhag:
KeyRAM: A 0.34 uJ/decision 18 k decisions/s Recurrent Attention In-memory Processor for Keyword Spotting. 1-4 - Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Edward Lee, Arvind Singh, Saibal Mukhopadhyay:
A Fully Synthesized Integrated Buck Regulator with Auto-generated GDS-II in 65nm CMOS Process. 1-4 - Haixin Song, Woogeun Rhee, Zhihua Wang:
A 6-8GHz Multichannel Reconfigurable Pulse-Based Transceiver with 3.5ns Processing Latency and 1cm Ranging Accuracy for Secure Wireless Connectivity. 1-4 - Xu Yang, Haixiao Cao, Wanyuan Qu:
A 9.3mV Load and 5.2mV Line transients Fast Response Buck Converter with Active Ramping Voltage Mode Control. 1-4 - Dongyi Liao, Fa Foster Dai:
A 7.7~10.3GHz 5.2mW -247.3dB-FOM Fractional-N Reference Sampling PLL with 2nd Order CDAC Based Fractional Spur Cancellation In 45nm CMOS. 1-4 - Michael P. Flynn, Jaehun Jeong, Sunmin Jang, Hyungil Chae, Daniel Weyer, Rundao Lu, John Bell:
Continuous-Time Bandpass Delta-Sigma Modulators and Bitstream Processing: (Invited). 1-8 - Sein Oh, Younggyun Oh, Juyoung Lee, Kihyun Kim, Seungjun Lee, Jintae Kim, Hyungil Chae:
A 80dB DR 6MHz Bandwidth Pipelined Noise-Shaping SAR ADC with 1-2 MASH structure. 1-4 - Shovan Maity, Nirmoy Modak, David Yang, Shitij Avlani, Mayukh Nath, Josef Danial, Debayan Das, Parikha Mehrotra, Shreyas Sen:
A 415 nW Physically and Mathematically Secure Electro-Quasistatic HBC Node in 65nm CMOS for Authentication and Medical Applications. 1-4 - Minkyu Kim, Jae-Sun Seo:
Deep Convolutional Neural Network Accelerator Featuring Conditional Computing and Low External Memory Access. 1-4 - Tayebeh Yousefi, Mansour Taghadosi, Alireza Dabbaghian, Ryan Siu, Gerd Grau, Georg Zoidl, Hossein Kassiri:
A 12.5mg mm-Scale Inductively-Powered Light-Directivity-Enhanced Highly-Linear Bidirectional Optogenetic Neuro-Stimulator. 1-4 - Vijay Kiran Kalyanam, Eric Mahurin, Keith A. Bowman, Jacob A. Abraham:
Randomized Pulse-Modulating Instruction-Issue Control Circuit for a Current and Temperature Limiting System in a 7nm Hexagon™ Compute DSP. 1-4 - Harish K. Krishnamurthy, Khondker Zakir Ahmed, Xiaosen Liu, Nachiket V. Desai, Suhwan Kim, Nicolas Butzen, Sally Amin, Sheldon Weng, Krishnan Ravichandran, James W. Tschanz, Vivek De:
Digital Control of Switching and Linear Integrated Voltage Regulators. 1-4 - Hamed Rahmani, Aydin Babakhani:
A 1.6mm3 Wirelessly Powered Reconfigurable FDD Radio with On-Chip Antennas Achieving 4.7 pJ/b TX and 1 pJ/b RX Energy Efficiencies for Medical Implants. 1-4 - Yanqiao Li, Benjamin L. Dobbins, Jason T. Stauth:
An 80-117V Pseudo-Adiabatic Drive Circuit for Microrobotic Actuators with Optical Power Delivery and Peak Power Reduction Factor over 14×. 1-4 - Maik Kaufmann, Achim Seidel, Bernhard Wicht:
Long, Short, Monolithic - The Gate Loop Challenge for GaN Drivers: Invited Paper. 1-5 - David D. Wentzloff, Abdullah Mohammed Alghaihab, Jaeho Im:
Ultra-Low Power Receivers for IoT Applications: A Review. 1-8 - Shenggang Dong, Ibukunoluwa Momson, Sandeep Kshattry, Pavan Yelleswarapu, Wooyeol Choi, Kenneth K. O:
A Wideband 180-GHz Phase-Lacked-Loop Based MSK Receiver. 1-4 - Fangyu Mao, Yan Lu, Edoardo Bonizzoni, Filippo Boera, Mo Huang, Franco Maloberti, Rui Paulo Martins:
A Power-Efficient Hybrid Single-Inductor Bipolar-Output DC-DC Converter with Floating Negative Output for AMOLED Displays. 1-4 - Hayden Bialek, Matthew L. Johnston, Arun Natarajan:
A 6-Transistor Ultra-Low Power CMOS Voltage Reference with 0.02%/V Line Sensitivity. 1-4 - Yuanming Zhu, Shengchang Cai, Shiva Kiran, Yang-Hang Fan, Po-Hsuan Chang, Sebastian Hoyos, Samuel Palermo:
A 1.5GS/s 8b Pipelined-SAR ADC with Output Level Shifting Settling Technique in 14nm CMOS. 1-4 - Edward Lee, Nael Mizanur Rahman, Venkata Chaitanya Krishna Chekuri, Saibal Mukhopadhyay:
An Authentication IC with Visible Light Based Interrogation in 65nm CMOS. 1-4 - Hossein Rahmanian Kooshkaki, Patrick P. Mercier:
A 0.55mW Fractional-N PLL with a DC-DC Powered Class-D VCO Achieving Better than -66dBc Fractional and Reference Spurs for NB-IoT. 1-4 - Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Mohamed R. Abdelhamid, Phillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan:
A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices. 1-4 - Alok Baluni, Shanthi Pavan:
A 20 MHz Bandwidth Continuous-Time Delta-Sigma ADC Achieving 82.1 dB SNDR and > 00 dB SFDR Using a Time-Interleaved Virtual-Ground-Switched FIR Feedback DAC. 1-4 - Mike Bichan, Clifford Ting, Bahram Zand, Jing Wang, Ruslana Shulyzki, James Guthrie, Katya Tyshchenko, Junhong Zhao, Alireza Parsafar, Eric Liu, Aynaz Vatankhahghadim, Shaham Sharifian, Aleksey Tyshchenko, Michael De Vita, Syed Rubab, Sitaraman Iyer, Fulvio Spagna, Noam Dolev:
A 32Gb/s NRZ 37dB SerDes in 10nm CMOS to Support PCI Express Gen 5 Protocol. 1-4 - Kuan-Chang Xavier Chen, William Wei-Ting Kuo, Azita Emami:
A 60-Gb/s PAM4 Wireline Receiver with 2-Tap Direct Decision Feedback Equalization Employing Track-and-Regenerate Slicers in 28-nm CMOS. 1-4 - Yiyu Shen, Rob Bootsman, Morteza S. Alavi, Leonardus de Vreede:
A 0.5-3 GHz I/Q Interleaved Direct-Digital RF Modulator with up to 320 MHz Modulation Bandwidth in 40 nm CMOS. 1-4 - Jaehyuk Lee, Surin Gweon, Kwonjoon Lee, Soyeon Um, Kyoung-Rog Lee, Kwantae Kim, Jihee Lee, Hoi-Jun Yoo:
A 9.6 mW/Ch 10 MHz Wide-bandwidth Electrical Impedance Tomography IC with Accurate Phase Compensation for Breast Cancer Detection. 1-4 - Jinyong Kim, Hyunkyu Ouh, Matthew L. Johnston:
A 43.8µW per Channel Biopotential Readout System using Frequency Division Multiplexing with Cable Motion Artifact Suppression. 1-4 - Abdul Rehman Aslam, Talha Iqbal, Mahnoor Aftab, Wala Saadeh, Muhammad Awais Bin Altaf:
A10.13uJ/classification 2-channel Deep Neural Network-based SoC for Emotion Detection of Autistic Children. 1-4 - Xiaochen Tang, Wei Tang:
A 151nW Second-Order Ternary Delta Modulator for ECG Slope Variation Measurement with Baseline Wandering Resilience. 1-4 - Marco Croce, Brian Friend, Francesco Nesta, Lorenzo Crespi, Piero Malcovati, Andrea Baschirotto:
A 760 nW, 180 nm CMOS Analog Voice Activity Detection System. 1-4 - Peter Lawrence Brown, Matthew R. O'Shaughnessy, Christopher J. Rozell, Justin Romberg, Michael P. Flynn:
A 17.8MS/s Neural-Network Compressed Sensing Radar Processor in 16nm FinFET CMOS. 1-4
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last updated on 2024-12-13 18:59 CET by the dblp team
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