With the rapid development of GPS (Global Positioning System) techniques, GPS gets
wider application in many fields. GPS has features such as high precision, global
coverage, convenience, high quality and low cost. Recently, the use of GPS extends
speedily from military to civilian applications such as automobile navigation systems
which combine the GPS system, e-map, and wireless network. GPS is getting popular,
and the market for GPS techniques is extending continuously.

 

UARTs provide serial asynchronous receive data synchronization, parallel-to-serial and
serial-to-parallel data conversion for both the transmitter and receiver sections. These
functions are necessary for converting the serial data stream into parallel data that is
required with digital systems. Synchronization for the serial data stream is accomplished
by adding start and stop bits to the transmit data to form a data character. Data integrity is
ensured by attaching a parity bit to the data character. The parity bit is checked by the
receiver for any transmission bit errors.
To a host system, the UART appears as an 8-bit input and output port that it can read from
and write to. Whenever the host has data to be sent, it just sends these data to the UART
in byte format (8-bit wide), whenever the UART receives data from another serial device it
will buffer these data in its FIFO (again, 8-bit wide), then it will indicate the availability of
these data to the host through an internal register bit, or through a hardware interrupt
signal.
In addition to the transmitter and the receiver, UARTs from Philips Semiconductors also
incorporate other features that significantly reduce software overhead and increase
system efficiency. Some of these features are:
* Wide range of supply voltage: 2.5 V, 3.3 V, 5.0 V
* Hardware and software autoflow control
* Large FIFOs (up to 256 bytes)
* Fast baud rate (5 Mbit/s max.)
 
* Industrial temperature range: –40 °C to +85 °C

* Fast bus access time (43 ns)
* Sleep mode, where the device current consumption is reduced to about 50 μA
* Small footprint (HVQFN32)
Hardware and software autoflow control prevent FIFO overflow conditions automatically.
Without automatic flow control, the host software needs to empty the receive FIFO
immediately when it is about to be filled up.
Large FIFOs reduce the host processor service time to the UART; this allows the
processor more time to do other tasks. Faster baud rate and faster bus access improve
the overall system performance; the system can send/receive more data in less time.