{"id":"https://openalex.org/W2109252533","doi":"https://doi.org/10.1504/ijes.2005.008805","title":"A methodology for validation of microprocessors using symbolic simulation","display_name":"A methodology for validation of microprocessors using symbolic simulation","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2109252533","doi":"https://doi.org/10.1504/ijes.2005.008805","mag":"2109252533"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1504/ijes.2005.008805","pdf_url":null,"source":{"id":"https://openalex.org/S204369148","display_name":"International Journal of Embedded Systems","issn_l":"1741-1068","issn":["1741-1068","1741-1076"],"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":true,"is_core":true,"host_organization":"https://openalex.org/P4310317825","host_organization_name":"Inderscience Publishers","host_organization_lineage":["https://openalex.org/P4310317825"],"host_organization_lineage_names":["Inderscience Publishers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006818844","display_name":"Prabhat Mishra","orcid":"https://orcid.org/0000-0003-3653-6221"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"funder","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Prabhat Mishra","raw_affiliation_strings":["[University of Florida]"],"affiliations":[{"raw_affiliation_string":"[University of Florida]","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007817952","display_name":"Nikil Dutt","orcid":"https://orcid.org/0000-0002-3060-8119"},"institutions":[{"id":"https://openalex.org/I204250578","display_name":"University of California, Irvine","ror":"https://ror.org/04gyf1771","country_code":"US","type":"funder","lineage":["https://openalex.org/I204250578"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nikil Dutt","raw_affiliation_strings":["[University of California, Irvine]"],"affiliations":[{"raw_affiliation_string":"[University of California, Irvine]","institution_ids":["https://openalex.org/I204250578"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112415263","display_name":"Narayanan Krishnamurthy","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Narayanan Krishnamurthy","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5011349515","display_name":"Magdy S. Abadir","orcid":"https://orcid.org/0000-0003-4046-2472"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Magdy Abadir","raw_affiliation_strings":["Freescale Semiconductor,"],"affiliations":[{"raw_affiliation_string":"Freescale Semiconductor,","institution_ids":[]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.322,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":1,"citation_normalized_percentile":{"value":0.385764,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":61,"max":68},"biblio":{"volume":"1","issue":"1/2","first_page":"14","last_page":"14"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9994,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/formal-equivalence-checking","display_name":"Formal equivalence checking","score":0.60435283},{"id":"https://openalex.org/keywords/model-validation","display_name":"Model Validation","score":0.43252563},{"id":"https://openalex.org/keywords/symbolic-trajectory-evaluation","display_name":"Symbolic trajectory evaluation","score":0.42002565}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8407506},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.6127748},{"id":"https://openalex.org/C96654402","wikidata":"https://www.wikidata.org/wiki/Q5469962","display_name":"Formal equivalence checking","level":3,"score":0.60435283},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.5264217},{"id":"https://openalex.org/C2780069185","wikidata":"https://www.wikidata.org/wiki/Q7977945","display_name":"Equivalence (formal languages)","level":2,"score":0.46762213},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.46213192},{"id":"https://openalex.org/C3019813237","wikidata":"https://www.wikidata.org/wiki/Q65089264","display_name":"Model validation","level":2,"score":0.43252563},{"id":"https://openalex.org/C23123167","wikidata":"https://www.wikidata.org/wiki/Q7661193","display_name":"Symbolic trajectory evaluation","level":3,"score":0.42002565},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.39594385},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.333301},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3238968},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23849788},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C2522767166","wikidata":"https://www.wikidata.org/wiki/Q2374463","display_name":"Data science","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1504/ijes.2005.008805","pdf_url":null,"source":{"id":"https://openalex.org/S204369148","display_name":"International Journal of Embedded Systems","issn_l":"1741-1068","issn":["1741-1068","1741-1076"],"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":true,"is_core":true,"host_organization":"https://openalex.org/P4310317825","host_organization_name":"Inderscience Publishers","host_organization_lineage":["https://openalex.org/P4310317825"],"host_organization_lineage_names":["Inderscience Publishers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":37,"referenced_works":["https://openalex.org/W1480254393","https://openalex.org/W1489215519","https://openalex.org/W1514254856","https://openalex.org/W1525387472","https://openalex.org/W1555915743","https://openalex.org/W1592819458","https://openalex.org/W1599313551","https://openalex.org/W1741528175","https://openalex.org/W1751589996","https://openalex.org/W1753021227","https://openalex.org/W1986558678","https://openalex.org/W2000498093","https://openalex.org/W2010074783","https://openalex.org/W2011968344","https://openalex.org/W2033263591","https://openalex.org/W2042345013","https://openalex.org/W2044621917","https://openalex.org/W2054151020","https://openalex.org/W2061247350","https://openalex.org/W2063162149","https://openalex.org/W2080267935","https://openalex.org/W2095572512","https://openalex.org/W2096506606","https://openalex.org/W2102606870","https://openalex.org/W2109355243","https://openalex.org/W2110011370","https://openalex.org/W2116141893","https://openalex.org/W2117742043","https://openalex.org/W2122397735","https://openalex.org/W2123388159","https://openalex.org/W2129616411","https://openalex.org/W2136932895","https://openalex.org/W2137474858","https://openalex.org/W2146147106","https://openalex.org/W2157202675","https://openalex.org/W2157328413","https://openalex.org/W71238222"],"related_works":["https://openalex.org/W4312733571","https://openalex.org/W2365988016","https://openalex.org/W2161772051","https://openalex.org/W2122355433","https://openalex.org/W2114398233","https://openalex.org/W2109238268","https://openalex.org/W1547517160","https://openalex.org/W1520389894","https://openalex.org/W1483297389","https://openalex.org/W113732979"],"abstract_inverted_index":{"Functional":[0],"validation":[1,22,55,73],"is":[2,25,63],"one":[3],"of":[4,23,28,45,89],"the":[5,12,21,26,67],"most":[6],"complex":[7],"and":[8,48],"expensive":[9],"tasks":[10],"in":[11,20],"current":[13],"processor":[14,72],"design":[15],"methodology.":[16],"A":[17],"significant":[18],"bottleneck":[19],"processors":[24],"lack":[27],"a":[29,38,43,53,58],"golden":[30],"reference":[31,69],"model.":[32],"Thus,":[33],"many":[34],"existing":[35],"approaches":[36],"employ":[37],"bottom-up":[39],"methodology":[40,80],"by":[41],"using":[42,57,74],"combination":[44],"simulation":[46],"techniques":[47],"formal":[49],"methods.":[50],"We":[51,77],"present":[52],"top-down":[54],"approach":[56],"language-based":[59],"specification.":[60],"The":[61],"specification":[62],"used":[64],"to":[65],"generate":[66],"necessary":[68],"models":[70],"for":[71,81],"symbolic":[75],"simulation.":[76],"applied":[78],"our":[79],"property":[82],"checking":[83,88],"as":[84,86],"well":[85],"equivalence":[87],"microprocessors.":[90]},"abstract_inverted_index_v3":null,"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2109252533","counts_by_year":[],"updated_date":"2025-03-23T13:35:51.075773","created_date":"2016-06-24"}