{"id":"https://openalex.org/W2017962632","doi":"https://doi.org/10.1155/2010/264390","title":"Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits","display_name":"Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits","publication_year":2010,"publication_date":"2010-04-27","ids":{"openalex":"https://openalex.org/W2017962632","doi":"https://doi.org/10.1155/2010/264390","mag":"2017962632"},"language":"en","primary_location":{"is_oa":true,"landing_page_url":"https://doi.org/10.1155/2010/264390","pdf_url":"https://downloads.hindawi.com/archive/2010/264390.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://downloads.hindawi.com/archive/2010/264390.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051431139","display_name":"Tooraj Nikoubin","orcid":"https://orcid.org/0000-0003-1724-3503"},"institutions":[{"id":"https://openalex.org/I48379061","display_name":"Shahid Beheshti University","ror":"https://ror.org/0091vmj44","country_code":"IR","type":"education","lineage":["https://openalex.org/I48379061"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Tooraj Nikoubin","raw_affiliation_strings":["Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, 1983963113, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, 1983963113, Tehran, Iran","institution_ids":["https://openalex.org/I48379061"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088435475","display_name":"Poona Bahrebar","orcid":null},"institutions":[{"id":"https://openalex.org/I48379061","display_name":"Shahid Beheshti University","ror":"https://ror.org/0091vmj44","country_code":"IR","type":"education","lineage":["https://openalex.org/I48379061"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Poona Bahrebar","raw_affiliation_strings":["Microlectronic Laboratory of Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, 1983963113, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Microlectronic Laboratory of Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, 1983963113, Tehran, Iran","institution_ids":["https://openalex.org/I48379061"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019076931","display_name":"Sara Pouri","orcid":null},"institutions":[{"id":"https://openalex.org/I48379061","display_name":"Shahid Beheshti University","ror":"https://ror.org/0091vmj44","country_code":"IR","type":"education","lineage":["https://openalex.org/I48379061"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Sara Pouri","raw_affiliation_strings":["Microlectronic Laboratory of Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, 1983963113, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Microlectronic Laboratory of Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, 1983963113, Tehran, Iran","institution_ids":["https://openalex.org/I48379061"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044886674","display_name":"Keivan Navi","orcid":"https://orcid.org/0000-0002-5586-7766"},"institutions":[{"id":"https://openalex.org/I48379061","display_name":"Shahid Beheshti University","ror":"https://ror.org/0091vmj44","country_code":"IR","type":"education","lineage":["https://openalex.org/I48379061"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Keivan Navi","raw_affiliation_strings":["Microlectronic Laboratory of Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, 1983963113, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Microlectronic Laboratory of Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, 1983963113, Tehran, Iran","institution_ids":["https://openalex.org/I48379061"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044779757","display_name":"Vaez Iravani","orcid":null},"institutions":[{"id":"https://openalex.org/I48379061","display_name":"Shahid Beheshti University","ror":"https://ror.org/0091vmj44","country_code":"IR","type":"education","lineage":["https://openalex.org/I48379061"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Vaez Iravani","raw_affiliation_strings":["Microlectronic Laboratory of Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, 1983963113, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Microlectronic Laboratory of Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, 1983963113, Tehran, Iran","institution_ids":["https://openalex.org/I48379061"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.401,"has_fulltext":true,"fulltext_origin":"pdf","cited_by_count":26,"citation_normalized_percentile":{"value":0.928602,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":91},"biblio":{"volume":"2010","issue":null,"first_page":"1","last_page":"17"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9993,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power\u2013delay-product","display_name":"Power\u2013delay product","score":0.44536394}],"concepts":[{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.6100817},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.57423085},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.53358424},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5265501},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.52405715},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5091452},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45424426},{"id":"https://openalex.org/C2776391166","wikidata":"https://www.wikidata.org/wiki/Q7236873","display_name":"Power\u2013delay product","level":4,"score":0.44536394},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4401353},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.4260247},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21235162},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16191375},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.16039816},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.08310324},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":true,"landing_page_url":"https://doi.org/10.1155/2010/264390","pdf_url":"https://downloads.hindawi.com/archive/2010/264390.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true}],"best_oa_location":{"is_oa":true,"landing_page_url":"https://doi.org/10.1155/2010/264390","pdf_url":"https://downloads.hindawi.com/archive/2010/264390.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/14","display_name":"Life below water","score":0.48}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":25,"referenced_works":["https://openalex.org/W1480110320","https://openalex.org/W1569550779","https://openalex.org/W1908188893","https://openalex.org/W1973100664","https://openalex.org/W1994627436","https://openalex.org/W2000462061","https://openalex.org/W2010390992","https://openalex.org/W2012158212","https://openalex.org/W2028477016","https://openalex.org/W2068387533","https://openalex.org/W2070072634","https://openalex.org/W2080686598","https://openalex.org/W2085452439","https://openalex.org/W2124278579","https://openalex.org/W2128306262","https://openalex.org/W2138968074","https://openalex.org/W2139354714","https://openalex.org/W2139978032","https://openalex.org/W2145269393","https://openalex.org/W2146113745","https://openalex.org/W2157595272","https://openalex.org/W2159229333","https://openalex.org/W2174953611","https://openalex.org/W3103339143","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W4385009842","https://openalex.org/W4225985484","https://openalex.org/W4200113551","https://openalex.org/W3161678484","https://openalex.org/W3037574826","https://openalex.org/W2619307913","https://openalex.org/W2527731084","https://openalex.org/W2376573441","https://openalex.org/W2187717486","https://openalex.org/W1863387014"],"abstract_inverted_index":{"A":[0],"new":[1,66],"transistor":[2,23,88],"sizing":[3,24,33,89],"algorithm,":[4,138],"SEA":[5,83,105,135],"(Simple":[6],"Exact":[7],"Algorithm),":[8],"for":[9,111],"optimizing":[10],"low-power":[11],"and":[12,31,37,97,109,120,126,136,143],"high-speed":[13],"arithmetic":[14],"integrated":[15],"circuits":[16],"is":[17],"proposed.":[18],"In":[19],"comparison":[20,102],"with":[21,107,157],"other":[22],"algorithms,":[25],"simplicity,":[26],"accuracy,":[27],"independency":[28],"of":[29,35,57,64,71,78,103,114],"order":[30],"initial":[32],"factors":[34],"transistors,":[36],"flexibility":[38],"in":[39,141,146],"choosing":[40],"the":[41,55,62,75,82,104,134,152,163],"optimization":[42,93],"parameters":[43],"such":[44,91],"as":[45,61,92],"power":[46],"consumption,":[47],"delay,":[48],"Power-Delay":[49],"Product":[50],"(PDP),":[51],"chip":[52],"area":[53],"or":[54],"combination":[56],"them":[58],"are":[59,74],"considered":[60],"advantages":[63],"this":[65],"algorithm.":[67,80],"More":[68],"exhaustive":[69],"rules":[70],"grouping":[72],"transistors":[73],"main":[76],"trait":[77],"our":[79],"Hence,":[81],"algorithm":[84,106],"dominates":[85],"some":[86],"major":[87],"metrics":[90],"rate,":[94],"simulation":[95],"speed,":[96],"reliability.":[98],"According":[99],"to":[100],"approximate":[101],"MDE":[108],"ADC":[110],"a":[112],"number":[113],"conventional":[115],"full":[116],"adder":[117],"circuits,":[118],"delay":[119,147],"PDP":[121,142],"have":[122,148,154],"been":[123,149,155],"improved":[124],"55.01%":[125],"57.92%":[127],"on":[128,162],"an":[129],"average,":[130],"respectively.":[131],"By":[132],"comparing":[133],"Chang's":[137],"25.64%":[139],"improvement":[140,145],"33.16%":[144],"achieved.":[150],"All":[151],"simulations":[153],"performed":[156],"0.13":[158],"m":[159],"technology":[160],"based":[161],"BSIM3v3":[164],"model":[165],"using":[166],"HSpice":[167],"simulator":[168],"software.":[169]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2017962632","counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2024-12-15T04:27:08.704454","created_date":"2016-06-24"}