{"id":"https://openalex.org/W2168107570","doi":"https://doi.org/10.1155/1995/92096","title":"The STC104 Packet Routing Chip","display_name":"The STC104 Packet Routing Chip","publication_year":1995,"publication_date":"1995-01-01","ids":{"openalex":"https://openalex.org/W2168107570","doi":"https://doi.org/10.1155/1995/92096","mag":"2168107570"},"language":"en","primary_location":{"is_oa":true,"landing_page_url":"https://doi.org/10.1155/1995/92096","pdf_url":"https://downloads.hindawi.com/archive/1995/092096.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/1995/092096.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074736175","display_name":"P. Thompson","orcid":"https://orcid.org/0000-0003-0661-2369"},"institutions":[{"id":"https://openalex.org/I4210109048","display_name":"Inmos","ror":"https://ror.org/01p4rys65","country_code":"GB","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210109048","https://openalex.org/I4210135508"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Peter W. Thompson","raw_affiliation_strings":["INMOS Limited"],"affiliations":[{"raw_affiliation_string":"INMOS Limited","institution_ids":["https://openalex.org/I4210109048"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011336349","display_name":"Julian D. Lewis","orcid":null},"institutions":[{"id":"https://openalex.org/I4210109048","display_name":"Inmos","ror":"https://ror.org/01p4rys65","country_code":"GB","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210109048","https://openalex.org/I4210135508"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Julian D. Lewis","raw_affiliation_strings":["INMOS Limited"],"affiliations":[{"raw_affiliation_string":"INMOS Limited","institution_ids":["https://openalex.org/I4210109048"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.344,"has_fulltext":true,"fulltext_origin":"pdf","cited_by_count":11,"citation_normalized_percentile":{"value":0.698708,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":78,"max":79},"biblio":{"volume":"2","issue":"4","first_page":"305","last_page":"314"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9992,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9979,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/component","display_name":"Component (thermodynamics)","score":0.5718822}],"concepts":[{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7582011},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.67691505},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.6153021},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6079748},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5874139},{"id":"https://openalex.org/C168167062","wikidata":"https://www.wikidata.org/wiki/Q1117970","display_name":"Component (thermodynamics)","level":2,"score":0.5718822},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49485582},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.45529133},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.43582296},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.34451538},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24836552},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.15730074},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08668512},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":true,"landing_page_url":"https://doi.org/10.1155/1995/92096","pdf_url":"https://downloads.hindawi.com/archive/1995/092096.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true}],"best_oa_location":{"is_oa":true,"landing_page_url":"https://doi.org/10.1155/1995/92096","pdf_url":"https://downloads.hindawi.com/archive/1995/092096.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true},"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.44,"id":"https://metadata.un.org/sdg/9"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":10,"referenced_works":["https://openalex.org/W1964415018","https://openalex.org/W1984520032","https://openalex.org/W2082060848","https://openalex.org/W2103276472","https://openalex.org/W2107997203","https://openalex.org/W2148323349","https://openalex.org/W2159159598","https://openalex.org/W2914484629","https://openalex.org/W4210379884","https://openalex.org/W61211546"],"related_works":["https://openalex.org/W4380607112","https://openalex.org/W4249035840","https://openalex.org/W3125341812","https://openalex.org/W2766970861","https://openalex.org/W2155019192","https://openalex.org/W2154356865","https://openalex.org/W2018755015","https://openalex.org/W2014709025","https://openalex.org/W1964071618","https://openalex.org/W1668171714"],"abstract_inverted_index":{"High\u2010performance":[0],"parallel":[1],"systems":[2],"demand":[3],"a":[4],"high\u2010performance":[5],"interconnect":[6,19,56],"so":[7],"that":[8],"their":[9],"component":[10],"parts":[11],"can":[12],"exchange":[13],"data":[14],"and":[15,23,31,46,91,96],"synchronise":[16],"efficiently.":[17],"The":[18,58,74],"must":[20,24],"be":[21],"cheap,":[22],"also":[25],"scale":[26],"well":[27],"in":[28],"both":[29],"performance":[30,101],"cost":[32],"relative":[33],"to":[34,85],"the":[35,43,49,51,63,72,77,83],"system":[36],"size.":[37],"In":[38],"this":[39],"paper":[40],"we":[41],"describe":[42],"rationale,":[44],"architecture":[45],"operation":[47,75],"of":[48,71,76,100],"STC104,":[50],"first":[52],"commercially":[53],"available,":[54],"general\u2010purpose":[55],"chip.":[57],"serial":[59],"protocols":[60],"used":[61],"by":[62,68],"device":[64],"are":[65,94,102],"described,":[66],"followed":[67],"an":[69],"overview":[70],"microarchitecture,":[73],"fundamental":[78],"block":[79],"is":[80],"outlined,":[81],"including":[82],"response":[84],"error":[86],"conditions.":[87],"Chip\u2010wide":[88],"design":[89,92],"issues":[90],"methodology":[93],"discussed,":[95],"finally":[97],"various":[98],"aspects":[99],"calculated.":[103]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2168107570","counts_by_year":[],"updated_date":"2024-12-08T20:23:34.861490","created_date":"2016-06-24"}