乐胖代购免代理版

{"id":"https://openalex.org/W2130211245","doi":"https://doi.org/10.1145/2206781.2206816","title":"Unifying functional and parametric timing verification","display_name":"Unifying functional and parametric timing verification","publication_year":2012,"publication_date":"2012-05-03","ids":{"openalex":"https://openalex.org/W2130211245","doi":"https://doi.org/10.1145/2206781.2206816","mag":"2130211245"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1145/2206781.2206816","pdf_url":null,"source":{"id":"https://openalex.org/S4363608736","display_name":"Proceedings of the Great Lakes Symposium on VLSI 2022","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074463063","display_name":"Lu\u00eds Guerra e Silva","orcid":"https://orcid.org/0000-0001-5761-0131"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":true,"raw_author_name":"Luis Guerra e Silva","raw_affiliation_strings":["INESC-ID / IST / TU Lisbon, Lisbon, Portugal"],"affiliations":[{"raw_affiliation_string":"INESC-ID / IST / TU Lisbon, Lisbon, Portugal","institution_ids":["https://openalex.org/I121345201"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5074463063"],"corresponding_institution_ids":["https://openalex.org/I121345201"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":0,"max":64},"biblio":{"volume":null,"issue":null,"first_page":"135","last_page":"140"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9996,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9996,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.73405904},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.66270244},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness","score":0.5888344},{"id":"https://openalex.org/keywords/satisfiability-modulo-theories","display_name":"Satisfiability Modulo Theories","score":0.5887829},{"id":"https://openalex.org/keywords/runtime-verification","display_name":"Runtime Verification","score":0.5296219},{"id":"https://openalex.org/keywords/high-level-verification","display_name":"High-level verification","score":0.47809193},{"id":"https://openalex.org/keywords/intelligent-verification","display_name":"Intelligent verification","score":0.44923478}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8286048},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.73405904},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.66270244},{"id":"https://openalex.org/C117251300","wikidata":"https://www.wikidata.org/wiki/Q1849855","display_name":"Parametric statistics","level":2,"score":0.5942234},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.5888344},{"id":"https://openalex.org/C164155591","wikidata":"https://www.wikidata.org/wiki/Q2067766","display_name":"Satisfiability modulo theories","level":2,"score":0.5887829},{"id":"https://openalex.org/C202973057","wikidata":"https://www.wikidata.org/wiki/Q7380130","display_name":"Runtime verification","level":3,"score":0.5296219},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.5265903},{"id":"https://openalex.org/C187250869","wikidata":"https://www.wikidata.org/wiki/Q5754573","display_name":"High-level verification","level":5,"score":0.47809193},{"id":"https://openalex.org/C3406870","wikidata":"https://www.wikidata.org/wiki/Q6044160","display_name":"Intelligent verification","level":5,"score":0.44923478},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.42161602},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4178453},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.36745822},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3257478},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.26767525},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.17193875},{"id":"https://openalex.org/C149091818","wikidata":"https://www.wikidata.org/wiki/Q2429814","display_name":"Software system","level":3,"score":0.08976811},{"id":"https://openalex.org/C186846655","wikidata":"https://www.wikidata.org/wiki/Q3398377","display_name":"Software construction","level":4,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1145/2206781.2206816","pdf_url":null,"source":{"id":"https://openalex.org/S4363608736","display_name":"Proceedings of the Great Lakes Symposium on VLSI 2022","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":23,"referenced_works":["https://openalex.org/W1481397690","https://openalex.org/W1511922765","https://openalex.org/W1511963917","https://openalex.org/W1546109728","https://openalex.org/W1964078389","https://openalex.org/W1966741973","https://openalex.org/W1984820433","https://openalex.org/W2011039300","https://openalex.org/W2095750317","https://openalex.org/W2104805914","https://openalex.org/W2118082889","https://openalex.org/W2121845874","https://openalex.org/W2127210464","https://openalex.org/W2130286574","https://openalex.org/W2136045023","https://openalex.org/W2136420478","https://openalex.org/W2142000962","https://openalex.org/W2145445699","https://openalex.org/W2148532438","https://openalex.org/W2149342513","https://openalex.org/W2164653142","https://openalex.org/W2169913777","https://openalex.org/W4298207198"],"related_works":["https://openalex.org/W4301348901","https://openalex.org/W3155012083","https://openalex.org/W3120172095","https://openalex.org/W3036403349","https://openalex.org/W2962898432","https://openalex.org/W2392047570","https://openalex.org/W2361881307","https://openalex.org/W2350806125","https://openalex.org/W2059150015","https://openalex.org/W2035244079"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,51,78],"unified":[4],"modeling":[5],"framework":[6,29,74],"for":[7,41,77],"timing":[8,22,32,47],"verification":[9,33,48],"of":[10,68,81],"IC":[11],"designs":[12],"that,":[13],"through":[14],"an":[15],"elegant":[16],"SMT-based":[17],"formulation,":[18],"seamlessly":[19],"integrates":[20],"functional":[21],"analysis":[23],"and":[24,39,66],"parametric":[25],"delay":[26],"modeling.":[27],"Such":[28],"enables":[30],"accurate":[31],"by":[34],"simultaneously":[35],"ignoring":[36],"false":[37],"paths":[38],"accounting":[40],"process":[42],"variability.":[43],"By":[44],"casting":[45],"the":[46,61],"problem":[49],"as":[50],"general":[52],"SMT":[53,70,86],"instance":[54],"it":[55],"is":[56,75],"possible":[57],"to":[58],"benefit":[59],"from":[60],"continuous":[62],"advances":[63],"in":[64],"performance":[65],"robustness":[67],"modern":[69],"engines.":[71],"The":[72],"proposed":[73],"validated":[76],"representative":[79],"set":[80],"benchmarks,":[82],"using":[83],"Microsoft's":[84],"Z3":[85],"solver.":[87]},"abstract_inverted_index_v3":null,"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2130211245","counts_by_year":[],"updated_date":"2025-01-19T03:47:42.229382","created_date":"2016-06-24"}