{"id":"https://openalex.org/W2108271947","doi":"https://doi.org/10.1145/1233501.1233512","title":"A gate delay model focusing on current fluctuation over wide-range of process and environmental variability","display_name":"A gate delay model focusing on current fluctuation over wide-range of process and environmental variability","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2108271947","doi":"https://doi.org/10.1145/1233501.1233512","mag":"2108271947"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1145/1233501.1233512","pdf_url":null,"source":{"id":"https://openalex.org/S4210177401","display_name":"Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design","issn_l":"1092-3152","issn":["1092-3152","1558-2434"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045069101","display_name":"Ken-ichi Shinkai","orcid":null},"institutions":[{"id":"https://openalex.org/I98285908","display_name":"Osaka University","ror":"https://ror.org/035t8zc32","country_code":"JP","type":"education","lineage":["https://openalex.org/I98285908"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Ken'ichi Shinkai","raw_affiliation_strings":["Dept. Information Systems Engineering, Osaka University, Osaka, Japan. shinkai.kenichi@ist.osaka-u.ac.jp"],"affiliations":[{"raw_affiliation_string":"Dept. Information Systems Engineering, Osaka University, Osaka, Japan. shinkai.kenichi@ist.osaka-u.ac.jp","institution_ids":["https://openalex.org/I98285908"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002405139","display_name":"Masanori Hashimoto","orcid":"https://orcid.org/0000-0002-0377-2108"},"institutions":[{"id":"https://openalex.org/I98285908","display_name":"Osaka University","ror":"https://ror.org/035t8zc32","country_code":"JP","type":"education","lineage":["https://openalex.org/I98285908"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masanori Hashimoto","raw_affiliation_strings":["Dept. Information Systems Engineering, Osaka University, Osaka, Japan. hasimoto@ist.osaka-u.ac.jp"],"affiliations":[{"raw_affiliation_string":"Dept. Information Systems Engineering, Osaka University, Osaka, Japan. hasimoto@ist.osaka-u.ac.jp","institution_ids":["https://openalex.org/I98285908"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108528404","display_name":"Atsushi Kurokawa","orcid":null},"institutions":[{"id":"https://openalex.org/I4210125918","display_name":"Semiconductor Energy Laboratory (Japan)","ror":"https://ror.org/02vszc135","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210125918"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Atsushi Kurokawa","raw_affiliation_strings":["Semiconductor Technology Academic Research Center (STARC), Kanagawa, Japan"],"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Academic Research Center (STARC), Kanagawa, Japan","institution_ids":["https://openalex.org/I4210125918"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061693379","display_name":"Takao Onoye","orcid":"https://orcid.org/0000-0002-1894-2448"},"institutions":[{"id":"https://openalex.org/I98285908","display_name":"Osaka University","ror":"https://ror.org/035t8zc32","country_code":"JP","type":"education","lineage":["https://openalex.org/I98285908"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Takao Onoye","raw_affiliation_strings":["Dept. Information Systems Engineering, Osaka University, Osaka, Japan. onoye@ist.osaka-u.ac.jp"],"affiliations":[{"raw_affiliation_string":"Dept. Information Systems Engineering, Osaka University, Osaka, Japan. onoye@ist.osaka-u.ac.jp","institution_ids":["https://openalex.org/I98285908"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.516,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":18,"citation_normalized_percentile":{"value":0.737258,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":86,"max":87},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.59233665},{"id":"https://openalex.org/keywords/process-corners","display_name":"Process corners","score":0.5168834}],"concepts":[{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.70049},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.6527405},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.64919794},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.59233665},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5473093},{"id":"https://openalex.org/C21200559","wikidata":"https://www.wikidata.org/wiki/Q7451068","display_name":"Sensitivity (control systems)","level":2,"score":0.5348275},{"id":"https://openalex.org/C192615534","wikidata":"https://www.wikidata.org/wiki/Q7247268","display_name":"Process corners","level":3,"score":0.5168834},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5054693},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4954363},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.48815447},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.46936303},{"id":"https://openalex.org/C148043351","wikidata":"https://www.wikidata.org/wiki/Q4456944","display_name":"Current (fluid)","level":2,"score":0.45571187},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.43082914},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.4182729},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.41175288},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.4100001},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.30451027},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21335748},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.17506927},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.17356765},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16404533},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0906581},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1145/1233501.1233512","pdf_url":null,"source":{"id":"https://openalex.org/S4210177401","display_name":"Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design","issn_l":"1092-3152","issn":["1092-3152","1558-2434"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.47,"id":"https://metadata.un.org/sdg/15","display_name":"Life on land"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":9,"referenced_works":["https://openalex.org/W2099320289","https://openalex.org/W2120566121","https://openalex.org/W2133276614","https://openalex.org/W2134067926","https://openalex.org/W2136328167","https://openalex.org/W2139197213","https://openalex.org/W2144031677","https://openalex.org/W2163262735","https://openalex.org/W3143002681"],"related_works":["https://openalex.org/W4229446324","https://openalex.org/W3015599398","https://openalex.org/W2345182073","https://openalex.org/W2158805860","https://openalex.org/W2110367374","https://openalex.org/W2101512735","https://openalex.org/W2100329931","https://openalex.org/W2034793671","https://openalex.org/W2003625360","https://openalex.org/W1986294008"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,79],"gate":[4,85,96],"delay":[5,30,128],"model":[6,21,39,47,58,111],"that":[7,83,108],"is":[8,31,40,54],"suitable":[9],"for":[10,42,139],"timing":[11,67,74,141],"analysis":[12,51,68],"considering":[13],"wide-range":[14],"process":[15],"and":[16,26,69,90,102,118,129,132],"environmental":[17],"variability.":[18],"The":[19,37,56],"proposed":[20,38,57,110],"focuses":[22],"on":[23,29],"current":[24,46],"variation":[25],"its":[27],"impact":[28],"considered":[32],"by":[33,49],"replacing":[34],"output":[35,120],"load.":[36,121],"applicable":[41],"large":[43],"variability":[44],"with":[45,114],"constructed":[48],"DC":[50],"whose":[52],"cost":[53],"small.":[55],"can":[59,112],"also":[60,106],"be":[61],"used":[62],"both":[63],"in":[64,70,78],"statistical":[65,140],"static":[66,73],"conventional":[71],"corner-based":[72],"analysis.":[75,142],"Experimental":[76],"results":[77],"90nm":[80],"technology":[81],"show":[82,133],"the":[84,109],"delays":[86],"of":[87,136],"inverter,":[88],"NAND":[89],"NOR":[91],"are":[92],"accurately":[93],"estimated":[94],"under":[95],"length,":[97],"threshold":[98],"voltage,":[99],"supply":[100],"voltage":[101],"temperature":[103],"fluctuation.":[104],"We":[105,122],"verify":[107],"cope":[113],"slow":[115],"input":[116],"transition":[117],"RC":[119],"demonstrate":[123],"applicability":[124],"to":[125],"multiple-stage":[126],"path":[127],"flip-flop":[130],"delay,":[131],"an":[134],"application":[135],"sensitivity":[137],"calculation":[138]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2108271947","counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2013,"cited_by_count":3}],"updated_date":"2024-12-10T17:19:18.345477","created_date":"2016-06-24"}