{"id":"https://openalex.org/W2125355761","doi":"https://doi.org/10.1145/1120725.1120793","title":"Scheduler implementation in MP SoC design","display_name":"Scheduler implementation in MP SoC design","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2125355761","doi":"https://doi.org/10.1145/1120725.1120793","mag":"2125355761"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1145/1120725.1120793","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002946576","display_name":"Young-Chul Cho","orcid":null},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Youngchul Cho","raw_affiliation_strings":[" Seoul National University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":" Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063521444","display_name":"Sungjoo Yoo","orcid":"https://orcid.org/0000-0002-5853-0675"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungjoo Yoo","raw_affiliation_strings":["Samsung Electronics, Soowon, Korea#TAB#"],"affiliations":[{"raw_affiliation_string":"Samsung Electronics, Soowon, Korea#TAB#","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043594476","display_name":"Ki\u2010Young Choi","orcid":"https://orcid.org/0000-0001-6138-6697"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kiyoung Choi","raw_affiliation_strings":[" Seoul National University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":" Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109240766","display_name":"Nacer-Eddine Zergainoh","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Nacer-Eddine Zergainoh","raw_affiliation_strings":["SLS group - TIMA Laboratory, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"SLS group - TIMA Laboratory, Grenoble, France","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113780350","display_name":"Ahmed Jerraya","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Ahmed Amine Jerraya","raw_affiliation_strings":["SLS group - TIMA Laboratory, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"SLS group - TIMA Laboratory, Grenoble, France","institution_ids":["https://openalex.org/I4210087012"]}]}],"institution_assertions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.825,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":27,"citation_normalized_percentile":{"value":0.845756,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":89},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.7126714},{"id":"https://openalex.org/keywords/processor-scheduling","display_name":"Processor scheduling","score":0.42765722},{"id":"https://openalex.org/keywords/fixed-priority-pre-emptive-scheduling","display_name":"Fixed-priority pre-emptive scheduling","score":0.4142827}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.869521},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.7126714},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.6789178},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.64524084},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.5870309},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.55381024},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.49623734},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.46505508},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45370218},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44223374},{"id":"https://openalex.org/C2984822820","wikidata":"https://www.wikidata.org/wiki/Q1123036","display_name":"Processor scheduling","level":3,"score":0.42765722},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.42705297},{"id":"https://openalex.org/C122141398","wikidata":"https://www.wikidata.org/wiki/Q5456330","display_name":"Fixed-priority pre-emptive scheduling","level":5,"score":0.4142827},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.38547474},{"id":"https://openalex.org/C107568181","wikidata":"https://www.wikidata.org/wiki/Q5319000","display_name":"Dynamic priority scheduling","level":3,"score":0.22279987},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.21512747},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.13722989},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.117503226},{"id":"https://openalex.org/C127456818","wikidata":"https://www.wikidata.org/wiki/Q238879","display_name":"Rate-monotonic scheduling","level":4,"score":0.091187656},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1145/1120725.1120793","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":11,"referenced_works":["https://openalex.org/W1899341555","https://openalex.org/W2050432237","https://openalex.org/W2097277660","https://openalex.org/W2104210557","https://openalex.org/W2116493640","https://openalex.org/W2120654797","https://openalex.org/W2122812594","https://openalex.org/W2143320611","https://openalex.org/W2148147784","https://openalex.org/W2151212580","https://openalex.org/W28644840"],"related_works":["https://openalex.org/W4238425097","https://openalex.org/W4200028128","https://openalex.org/W2155564881","https://openalex.org/W2153689068","https://openalex.org/W2142842318","https://openalex.org/W2134658009","https://openalex.org/W2116365123","https://openalex.org/W2104524790","https://openalex.org/W2062808533","https://openalex.org/W1809394610"],"abstract_inverted_index":{"In":[0,18,67],"the":[1,33,48,71,81,86,104],"design":[2,14],"of":[3,39,73,85,106],"a":[4,12,27,40,44,97],"heterogeneous":[5],"multiprocessor":[6],"system":[7,41],"on":[8],"chip,":[9],"we":[10,21,51,69,102],"face":[11],"new":[13],"problem;":[15],"scheduler":[16,49,61,89],"implementation.":[17,78],"this":[19],"paper,":[20],"present":[22],"an":[23],"approach":[24],"to":[25,43],"implementing":[26],"static":[28],"scheduler,":[29],"which":[30,63],"controls":[31],"all":[32],"task":[34],"executions":[35],"and":[36,55,83,96],"communication":[37],"transactions":[38],"according":[42],"pre-determined":[45],"schedule.":[46],"For":[47],"implementation,":[50],"consider":[52,60],"both":[53],"intra-processor":[54],"inter-processor":[56],"synchronization.":[57],"We":[58,79],"also":[59],"overhead,":[62],"is":[64],"often":[65],"neglected.":[66],"particular,":[68],"address":[70],"issue":[72],"centralized":[74],"implementation":[75],"versus":[76],"distributed":[77],"investigate":[80],"pros":[82],"cons":[84],"two":[87],"different":[88],"implementations.":[90],"Through":[91],"experiments":[92],"with":[93],"synthetic":[94],"examples":[95],"real":[98],"world":[99],"multimedia":[100],"application,":[101],"show":[103],"effectiveness":[105],"our":[107],"approach.":[108]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2125355761","counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2012,"cited_by_count":3}],"updated_date":"2024-12-09T22:59:52.019893","created_date":"2016-06-24"}