{"id":"https://openalex.org/W4389066898","doi":"https://doi.org/10.1109/tvlsi.2023.3324533","title":"Editorial Rolling Out the IEEE TVLSI EDICS","display_name":"Editorial Rolling Out the IEEE TVLSI EDICS","publication_year":2023,"publication_date":"2023-11-27","ids":{"openalex":"https://openalex.org/W4389066898","doi":"https://doi.org/10.1109/tvlsi.2023.3324533"},"language":"en","primary_location":{"is_oa":true,"landing_page_url":"https://doi.org/10.1109/tvlsi.2023.3324533","pdf_url":"https://ieeexplore.ieee.org/ielx7/92/10328903/10328932.pdf","source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://ieeexplore.ieee.org/ielx7/92/10328903/10328932.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068766978","display_name":"Mircea R. Stan","orcid":"https://orcid.org/0000-0003-0577-9976"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Mircea R. Stan","raw_affiliation_strings":[],"affiliations":[]}],"institution_assertions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":["https://openalex.org/A5068766978"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"fulltext_origin":"pdf","cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":0,"max":67},"biblio":{"volume":"31","issue":"12","first_page":"1879","last_page":"1881"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9693,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9693,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9577,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/expansive","display_name":"Expansive","score":0.83612406}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.9021554},{"id":"https://openalex.org/C2780502288","wikidata":"https://www.wikidata.org/wiki/Q28838156","display_name":"Expansive","level":3,"score":0.83612406},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7027867},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.54032964},{"id":"https://openalex.org/C9652623","wikidata":"https://www.wikidata.org/wiki/Q190109","display_name":"Field (mathematics)","level":2,"score":0.51953393},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.47147942},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4382571},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.43494898},{"id":"https://openalex.org/C2778755073","wikidata":"https://www.wikidata.org/wiki/Q10858537","display_name":"Scale (ratio)","level":2,"score":0.4346141},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3908429},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.30777663},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20066246},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18355805},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C30407753","wikidata":"https://www.wikidata.org/wiki/Q186191","display_name":"Compressive strength","level":2,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":true,"landing_page_url":"https://doi.org/10.1109/tvlsi.2023.3324533","pdf_url":"https://ieeexplore.ieee.org/ielx7/92/10328903/10328932.pdf","source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true}],"best_oa_location":{"is_oa":true,"landing_page_url":"https://doi.org/10.1109/tvlsi.2023.3324533","pdf_url":"https://ieeexplore.ieee.org/ielx7/92/10328903/10328932.pdf","source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true},"sustainable_development_goals":[{"score":0.48,"id":"https://metadata.un.org/sdg/16","display_name":"Peace, justice, and strong institutions"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4302368440","https://openalex.org/W4298284054","https://openalex.org/W3215142653","https://openalex.org/W3207631643","https://openalex.org/W2964116984","https://openalex.org/W2910590812","https://openalex.org/W2271765275","https://openalex.org/W2157609968","https://openalex.org/W194748710","https://openalex.org/W1487051936"],"abstract_inverted_index":{"VLSI":[0],"Systems":[1],"research":[2,59],"represents":[3],"a":[4,16,93],"dynamic":[5],"and":[6,27,37,41,56,114],"expansive":[7],"domain.":[8],"Over":[9],"the":[10,32,47,57,97,106,120],"years,":[11],"it":[12],"has":[13],"evolved":[14],"into":[15],"creative":[17],"fusion":[18],"of":[19,35,46,50,87,96,109,124],"theoretical":[20],"exploration,":[21],"integrated":[22],"chip":[23],"design,":[24],"performance":[25],"evaluation,":[26],"practical":[28],"applications":[29],"related":[30],"to":[31,91,111],"wide":[33],"areas":[34],"circuits":[36],"systems,":[38],"computer":[39],"hardware":[40],"solid-state":[42],"circuits.":[43],"In":[44],"acknowledgment":[45],"extensive":[48],"influence":[49],"very":[51],"large-scale":[52],"integration":[53],"(VLSI)":[54,82],"systems":[55],"diverse":[58],"trends":[60],"within":[61,100],"this":[62],"field,":[63],"we":[64],"have":[65],"embarked":[66],"on":[67,77],"an":[68],"Editor\u2019s":[69],"Information":[70],"Classification":[71],"Scheme":[72],"(EDICS)":[73],"for":[74],"IEEE":[75],"Transactions":[76],"Very":[78],"Large":[79],"Scale":[80],"Integration":[81],"Systems.":[83],"The":[84],"primary":[85],"purpose":[86],"these":[88],"EDICS":[89],"is":[90],"provide":[92],"comprehensive":[94],"description":[95],"focal":[98],"points":[99],"TVLSI.":[101],"Furthermore,":[102],"they":[103],"aid":[104],"in":[105,119],"judicious":[107],"allocation":[108],"papers":[110],"associate":[112],"editors":[113],"reviewers":[115],"who":[116],"possess":[117],"expertise":[118],"specific":[121],"subject":[122],"matter":[123],"each":[125],"submission.":[126]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W4389066898","counts_by_year":[],"updated_date":"2025-01-04T12:43:00.755768","created_date":"2023-11-28"}