乐胖代购免代理版

{"id":"https://openalex.org/W2944065234","doi":"https://doi.org/10.1109/tvlsi.2019.2910825","title":"A Physics-Based Variability-Aware Methodology to Estimate Critical Charge for Near-Threshold Voltage Latches","display_name":"A Physics-Based Variability-Aware Methodology to Estimate Critical Charge for Near-Threshold Voltage Latches","publication_year":2019,"publication_date":"2019-05-08","ids":{"openalex":"https://openalex.org/W2944065234","doi":"https://doi.org/10.1109/tvlsi.2019.2910825","mag":"2944065234"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2910825","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085045684","display_name":"Chaudhry Indra Kumar","orcid":"https://orcid.org/0000-0002-7605-3630"},"institutions":[{"id":"https://openalex.org/I154851008","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326","country_code":"IN","type":"education","lineage":["https://openalex.org/I154851008"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Chaudhry Indra Kumar","raw_affiliation_strings":["Department of Electronics and Communication Engineering, IIT Roorkee, Roorkee, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, IIT Roorkee, Roorkee, India","institution_ids":["https://openalex.org/I154851008"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063362921","display_name":"Ishant Bhatia","orcid":"https://orcid.org/0000-0001-6879-4511"},"institutions":[{"id":"https://openalex.org/I154851008","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326","country_code":"IN","type":"education","lineage":["https://openalex.org/I154851008"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ishant Bhatia","raw_affiliation_strings":["Department of Electronics and Communication Engineering, IIT Roorkee, Roorkee, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, IIT Roorkee, Roorkee, India","institution_ids":["https://openalex.org/I154851008"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100732194","display_name":"Arvind K. Sharma","orcid":"https://orcid.org/0000-0002-9250-9642"},"institutions":[{"id":"https://openalex.org/I154851008","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326","country_code":"IN","type":"education","lineage":["https://openalex.org/I154851008"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Arvind Kumar Sharma","raw_affiliation_strings":["Department of Electronics and Communication Engineering, IIT Roorkee, Roorkee, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, IIT Roorkee, Roorkee, India","institution_ids":["https://openalex.org/I154851008"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023973225","display_name":"Deep Sehgal","orcid":null},"institutions":[{"id":"https://openalex.org/I101407740","display_name":"Chandigarh University","ror":"https://ror.org/05t4pvx35","country_code":"IN","type":"education","lineage":["https://openalex.org/I101407740"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Deep Sehgal","raw_affiliation_strings":["Semi-Conductor Laboratory Chandigarh, Chandigarh, India"],"affiliations":[{"raw_affiliation_string":"Semi-Conductor Laboratory Chandigarh, Chandigarh, India","institution_ids":["https://openalex.org/I101407740"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059438378","display_name":"H. S. Jatana","orcid":null},"institutions":[{"id":"https://openalex.org/I101407740","display_name":"Chandigarh University","ror":"https://ror.org/05t4pvx35","country_code":"IN","type":"education","lineage":["https://openalex.org/I101407740"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"H. S. Jatana","raw_affiliation_strings":["Semi-Conductor Laboratory Chandigarh, Chandigarh, India"],"affiliations":[{"raw_affiliation_string":"Semi-Conductor Laboratory Chandigarh, Chandigarh, India","institution_ids":["https://openalex.org/I101407740"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031850929","display_name":"Anand Bulusu","orcid":"https://orcid.org/0000-0002-3986-3730"},"institutions":[{"id":"https://openalex.org/I154851008","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326","country_code":"IN","type":"education","lineage":["https://openalex.org/I154851008"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anand Bulusu","raw_affiliation_strings":["Department of Electronics and Communication Engineering, IIT Roorkee, Roorkee, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, IIT Roorkee, Roorkee, India","institution_ids":["https://openalex.org/I154851008"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.091,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":2,"citation_normalized_percentile":{"value":0.482602,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":69,"max":74},"biblio":{"volume":"27","issue":"9","first_page":"2170","last_page":"2179"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.839869},{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.78566},{"id":"https://openalex.org/keywords/transient","display_name":"Transient (computer programming)","score":0.5271682},{"id":"https://openalex.org/keywords/single-event-upset","display_name":"Single event upset","score":0.44384193}],"concepts":[{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.839869},{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.78566},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6423251},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.58607805},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.556538},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.53609633},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.53298396},{"id":"https://openalex.org/C188082385","wikidata":"https://www.wikidata.org/wiki/Q73792","display_name":"Charge (physics)","level":2,"score":0.5302605},{"id":"https://openalex.org/C2780799671","wikidata":"https://www.wikidata.org/wiki/Q17087362","display_name":"Transient (computer programming)","level":2,"score":0.5271682},{"id":"https://openalex.org/C2780073065","wikidata":"https://www.wikidata.org/wiki/Q1476733","display_name":"Single event upset","level":3,"score":0.44384193},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.44221938},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.440678},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41843212},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.41407353},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.36361933},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.35493556},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.091641426},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2910825","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":28,"referenced_works":["https://openalex.org/W1491082069","https://openalex.org/W1518236483","https://openalex.org/W1540206583","https://openalex.org/W1588171175","https://openalex.org/W1661368752","https://openalex.org/W1981970801","https://openalex.org/W2015524290","https://openalex.org/W2044443802","https://openalex.org/W2048751700","https://openalex.org/W2051595052","https://openalex.org/W2065873116","https://openalex.org/W2088115909","https://openalex.org/W2095913060","https://openalex.org/W2116597081","https://openalex.org/W2122747234","https://openalex.org/W2131833150","https://openalex.org/W2136468077","https://openalex.org/W2142358791","https://openalex.org/W2144289559","https://openalex.org/W2151829775","https://openalex.org/W2151966987","https://openalex.org/W2155051493","https://openalex.org/W2168525368","https://openalex.org/W2344743430","https://openalex.org/W2558527383","https://openalex.org/W2753762398","https://openalex.org/W413878220","https://openalex.org/W649475307"],"related_works":["https://openalex.org/W4221121827","https://openalex.org/W4211237868","https://openalex.org/W2622269177","https://openalex.org/W2165400042","https://openalex.org/W2122334461","https://openalex.org/W2102538861","https://openalex.org/W2086616086","https://openalex.org/W2060193918","https://openalex.org/W1553526993","https://openalex.org/W1523508240"],"abstract_inverted_index":{"Near-threshold":[0],"voltage":[1,90],"(NTV)":[2],"digital":[3],"VLSI":[4],"circuits,":[5],"though":[6],"important,":[7],"have":[8],"their":[9],"sequential":[10],"elements":[11],"vulnerable":[12],"to":[13,59,155,180],"soft":[14],"errors.":[15],"The":[16,94],"critical":[17,44,62,95,158,187],"charge":[18,45,63,96,159,188],"for":[19,24,171,189],"a":[20,25,55,65,69,109,153,161,166,172],"single":[21,167],"event":[22],"upset":[23],"D-latch":[26,67],"depends":[27],"on":[28],"its":[29,72],"fan-out":[30,73],"load,":[31,74],"supply":[32,75],"voltage,":[33,76],"and":[34,78,165],"transistor":[35,79],"level":[36],"parameters.":[37,81],"A":[38],"SPICE":[39,169],"simulation-based":[40],"estimation":[41,184],"of":[42,64,71,112,142,185],"the":[43,61,99,126,157,186],"is":[46,101,146,176],"highly":[47],"resource/time":[48],"intensive.":[49],"In":[50],"this":[51,149],"paper,":[52],"we":[53,151],"propose":[54],"physics-based":[56],"semianalytical":[57],"model":[58,100,127],"estimate":[60,156],"static":[66],"as":[68],"function":[70],"temperature,":[77],"levels":[80],"It":[82],"can,":[83],"therefore,":[84],"be":[85],"used":[86],"while":[87],"considering":[88],"process":[89,119],"temperature":[91],"(PVT)":[92],"variations.":[93],"estimated":[97],"by":[98],"in":[102,191],"good":[103],"agreement":[104],"with":[105,108],"SPECTER":[106],"simulations":[107,138,164],"maximum":[110,140],"error":[111,141],"less":[113,143],"than":[114,144],"3.4%":[115],"employing":[116],"STMicroelectronics":[117],"65-nm":[118],"design":[120,135],"kit":[121],"(PDK).":[122],"We":[123],"also":[124],"validated":[125],"at":[128],"32-nm":[129],"technology":[130,133],"node":[131],"using":[132,160],"computer-aided":[134],"(TCAD)":[136],"mixed-mode":[137],"(a":[139],"7.5%":[145],"observed).":[147],"Using":[148],"model,":[150],"devise":[152],"methodology":[154],"few":[162],"dc":[163],"transient":[168],"simulation":[170],"given":[173],"PDK.":[174],"This":[175],"an":[177,182],"end-to-end":[178],"method":[179],"include":[181],"accurate":[183],"latches":[190],"NTV":[192],"standard":[193],"cell":[194],"library":[195],"characterization.":[196]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2944065234","counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2024-12-19T09:43:59.208721","created_date":"2019-05-16"}