乐胖代购免代理版

{"id":"https://openalex.org/W2789800904","doi":"https://doi.org/10.1109/tvlsi.2018.2812800","title":"Stateful Memristor-Based Search Architecture","display_name":"Stateful Memristor-Based Search Architecture","publication_year":2018,"publication_date":"2018-03-22","ids":{"openalex":"https://openalex.org/W2789800904","doi":"https://doi.org/10.1109/tvlsi.2018.2812800","mag":"2789800904"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2018.2812800","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047341631","display_name":"Yasmin Halawani","orcid":"https://orcid.org/0000-0001-9617-5080"},"institutions":[{"id":"https://openalex.org/I176601375","display_name":"Khalifa University of Science and Technology","ror":"https://ror.org/05hffr360","country_code":"AE","type":"education","lineage":["https://openalex.org/I176601375"]}],"countries":["AE"],"is_corresponding":false,"raw_author_name":"Yasmin Halawani","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi, United Arab Emirates"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi, United Arab Emirates","institution_ids":["https://openalex.org/I176601375"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015216966","display_name":"Muath Abu Lebdeh","orcid":"https://orcid.org/0000-0002-8610-3064"},"institutions":[{"id":"https://openalex.org/I176601375","display_name":"Khalifa University of Science and Technology","ror":"https://ror.org/05hffr360","country_code":"AE","type":"education","lineage":["https://openalex.org/I176601375"]}],"countries":["AE"],"is_corresponding":false,"raw_author_name":"Muath Abu Lebdeh","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi, United Arab Emirates"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi, United Arab Emirates","institution_ids":["https://openalex.org/I176601375"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013814572","display_name":"Baker Mohammad","orcid":"https://orcid.org/0000-0002-6063-473X"},"institutions":[{"id":"https://openalex.org/I176601375","display_name":"Khalifa University of Science and Technology","ror":"https://ror.org/05hffr360","country_code":"AE","type":"education","lineage":["https://openalex.org/I176601375"]}],"countries":["AE"],"is_corresponding":false,"raw_author_name":"Baker Mohammad","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi, United Arab Emirates"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi, United Arab Emirates","institution_ids":["https://openalex.org/I176601375"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020682177","display_name":"Mahmoud Al\u2010Qutayri","orcid":"https://orcid.org/0000-0002-9600-8036"},"institutions":[{"id":"https://openalex.org/I176601375","display_name":"Khalifa University of Science and Technology","ror":"https://ror.org/05hffr360","country_code":"AE","type":"education","lineage":["https://openalex.org/I176601375"]}],"countries":["AE"],"is_corresponding":false,"raw_author_name":"Mahmoud Al-Qutayri","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi, United Arab Emirates"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi, United Arab Emirates","institution_ids":["https://openalex.org/I176601375"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053660700","display_name":"Said F. Al-Sarawi","orcid":"https://orcid.org/0000-0002-3242-8197"},"institutions":[{"id":"https://openalex.org/I5681781","display_name":"University of Adelaide","ror":"https://ror.org/00892tw58","country_code":"AU","type":"education","lineage":["https://openalex.org/I5681781"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Said F. Al-Sarawi","raw_affiliation_strings":["Center for Biomedical Engineering, The University of Adelaide, Adelaide, SA, Australia"],"affiliations":[{"raw_affiliation_string":"Center for Biomedical Engineering, The University of Adelaide, Adelaide, SA, Australia","institution_ids":["https://openalex.org/I5681781"]}]}],"institution_assertions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.256,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":15,"citation_normalized_percentile":{"value":0.716809,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":89},"biblio":{"volume":"26","issue":"12","first_page":"2773","last_page":"2780"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12236","display_name":"Photoreceptor and optogenetics research","score":0.9885,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9835,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.88557947}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.88557947},{"id":"https://openalex.org/C22927095","wikidata":"https://www.wikidata.org/wiki/Q1784206","display_name":"Stateful firewall","level":3,"score":0.84559685},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.62446487},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5792549},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5037491},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.35666525},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.18552274},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14316732},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.123246014},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2018.2812800","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":40,"referenced_works":["https://openalex.org/W1506087895","https://openalex.org/W1969713953","https://openalex.org/W1970645895","https://openalex.org/W1989802107","https://openalex.org/W1997611279","https://openalex.org/W2013055927","https://openalex.org/W2013406643","https://openalex.org/W2029891818","https://openalex.org/W2031176269","https://openalex.org/W2036899386","https://openalex.org/W2055898521","https://openalex.org/W2062143991","https://openalex.org/W2066280488","https://openalex.org/W2081729575","https://openalex.org/W2090737712","https://openalex.org/W2094295669","https://openalex.org/W2094452907","https://openalex.org/W2106343578","https://openalex.org/W2112181056","https://openalex.org/W2121630943","https://openalex.org/W2159461700","https://openalex.org/W2248506981","https://openalex.org/W2249017129","https://openalex.org/W2276531971","https://openalex.org/W2277631960","https://openalex.org/W2342387592","https://openalex.org/W2343612026","https://openalex.org/W2399958287","https://openalex.org/W2411092785","https://openalex.org/W2420036144","https://openalex.org/W2514437230","https://openalex.org/W2521159225","https://openalex.org/W2587921983","https://openalex.org/W2590458491","https://openalex.org/W2592441025","https://openalex.org/W2604969897","https://openalex.org/W2743575791","https://openalex.org/W2771687934","https://openalex.org/W3101084337","https://openalex.org/W3151055086"],"related_works":["https://openalex.org/W4312120139","https://openalex.org/W4229452466","https://openalex.org/W2966276069","https://openalex.org/W2583381754","https://openalex.org/W2566747981","https://openalex.org/W2222333653","https://openalex.org/W2144255176","https://openalex.org/W2038503502","https://openalex.org/W1970797462","https://openalex.org/W109977192"],"abstract_inverted_index":{"Computer":[0],"vision":[1],"and":[2,26,43,94,142,151,175,209],"recognition":[3],"is":[4,17,47,52,84,122,153,177],"emerging":[5],"as":[6,91],"one":[7],"of":[8,54,109,137,148,172,180,201],"the":[9,23,66,102,138,170,178,202],"important":[10],"pillars":[11],"in":[12,33,207],"artificial":[13],"intelligence":[14],"systems.":[15],"It":[16,97],"a":[18,48,58,75,116,125,131,156,187,221],"vital":[19],"way":[20],"to":[21],"interpret":[22],"collected":[24],"data":[25,174],"find":[27],"matching":[28,93],"patterns":[29],"that":[30,51,121],"will":[31],"help":[32],"real-time":[34],"decision":[35],"making.":[36],"CMOS-based":[37],"search":[38,56,70,198,208,223],"engines":[39],"suffer":[40],"from":[41],"density":[42,191],"power":[44],"limitations.":[45],"Memristor":[46],"feasible":[49],"candidate":[50],"capable":[53],"performing":[55],"within":[57],"stored":[59],"structure":[60],"(in-memory":[61],"computing).":[62],"This":[63,184],"paper":[64],"proposes":[65],"first":[67],"memristor-based":[68,197],"stateful":[69,77],"engine":[71],"architecture":[72,204,219],"based":[73],"on":[74],"novel":[76],"heterogeneous":[78],"memristive":[79],"XOR":[80,104,111],"gate.":[81,105],"The":[82,106,128,217],"design":[83,129],"suitable":[85],"for":[86,135,186],"2-D":[87,146],"media":[88],"applications,":[89],"such":[90],"image":[92],"pattern":[95],"inspection.":[96],"performs":[98],"bitwise":[99],"comparison":[100],"using":[101,212,233],"proposed":[103,203,218],"output":[107,152],"states":[108],"all":[110],"gates":[112],"are":[113],"transferred":[114],"into":[115,155],"single":[117,132,157],"analog":[118],"memristor":[119,133],"value":[120],"read":[123],"via":[124],"digital":[126],"comparator.":[127],"assumes":[130],"device":[134],"each":[136],"incoming":[139],"data,":[140],"template,":[141,150],"result":[143],"bits.":[144],"Each":[145],"array":[147,159],"input,":[149],"reordered":[154],"1-D":[158],"with":[160],"3":[161],"\u00d7":[162,164],"(N":[163],"M)":[165],"structure,":[166],"where":[167],"N":[168],"represents":[169],"number":[171,179],"entry":[173],"M":[176],"bits":[181],"per":[182],"entry.":[183],"allows":[185],"significantly":[188],"higher":[189],"storage":[190],"than":[192],"conventional":[193],"CMOSbased":[194],"or":[195],"other":[196],"engines.":[199],"Simulations":[200],"demonstrate":[205],"functionalities":[206],"compare":[210],"modes":[211],"an":[213],"LTSpice":[214],"circuit":[215],"simulator.":[216],"achieves":[220],"3-ns":[222],"cycle":[224],"time":[225],"at":[226,229],"0.34":[227],"nJ/database":[228],"1.5":[230],"V/1":[231],"GHz":[232],"2N":[234],"+":[235],"1":[236],"memristors.":[237]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2789800904","counts_by_year":[{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":2}],"updated_date":"2024-12-12T18:22:20.157863","created_date":"2018-03-29"}